Patents Assigned to Jun-ichi Nishizawa
-
Patent number: 5693139Abstract: A cycle of alternately or cyclically introducing external gases containing molecules of component elements of a compound semiconductor to be formed on a substrate is repeated while appropriately controlling the pressure, substrate temperature and gas introduction rate in a crystal growth vessel, so that a monocrystal which is dimensionally as precise as a single monolayer can grow on the substrate by making use of chemical reactions on the heated substrate surface.Doped molecular layer epitaxy of a compound semiconductor comprising individual steps of introducing and evacuating a first source gas, introducing and evacuating a second source gas, and introducing and evacuating an impurity gas which contains an impurity element. The doped impurity concentration varies almost linearly with the pressure during doping in a wide range.Type: GrantFiled: June 15, 1993Date of Patent: December 2, 1997Assignees: Research Development Corporation of Japan, Jun-Ichi Nishizawa, Oki Electric Company, Soubei SuzukiInventors: Junichi Nishizawa, Hitoshi Abe, Soubei Suzuki
-
Patent number: 5463977Abstract: In a method of and an apparatus for epitaxially growing a chemical-compound crystal, a plurality of raw-material gasses are alternately introduced into a closed chamber of a crystal growing device to grow the crystal placed within the closed chamber. At growing of the crystal, a light from a light source is emitted to a crystal growing film of the crystal. Intensity of a light reflected from the crystal growing film and received by a photo detector is measured. Charge amounts of the respective raw-material gasses are controlled by a control system on the basis of a change in the reflected-light intensity, thereby controlling a growing rate of the growing film.Type: GrantFiled: July 15, 1993Date of Patent: November 7, 1995Assignees: Research Development Corporation, Nobuaki Manada, Toru Kurabayashi, Jun-Ichi NishizawaInventors: Nobuaki Manada, Junji Ito, Toru Kurabayashi, Jun-ichi Nishizawa
-
Patent number: 5296403Abstract: A semiconductor device comprises a vertical MIS-SIT which has a smaller source-to-drain distance for operation at ultra-high speed. The semiconductor device has a substrate crystal for epitaxial growth thereon, least two semiconductor regions of different conductivity types deposited by way of epitaxial growth on the substrate crystal according to either metal organic chemical vapor deposition (MO-CVD) or molecular layer epitaxy (MLE), thereby providing a source-drain structure, a gate side formed by etching the semiconductor regions of the source-drain structure, the gate side comprising either a (111)A face or a (111)B face, and a semiconductor region deposited as a gate by way of epitaxial growth on the gate side according to either MO-CVD or MLE.Type: GrantFiled: October 23, 1992Date of Patent: March 22, 1994Assignees: Research Development Corp. of Japan, Jun-ichi Nishizawa, Zaidan Hojin Handotai Kenkyu ShinkokaiInventors: Jun-ichi Nishizawa, Toru Kurabayashi
-
Patent number: 5254207Abstract: Material and impurity gases are introduced into a crystal growth chamber to grow a crystal film on a GaAs substrate. A light beam emitted from a variable-wavelength light source is applied to the crystal film being grown on the substrate while varying the wavelength of the light beam. The dependency, on the wavelength of the light beam, of the intensity of light reflected by the crystal film is measured, and an optimum wavelength is selected for measurement depending on the type of molecules adsorbed while the crystal film is being grown. Light is then applied at the optimum wavelength to the crystal film being grown, and a time-dependent change in the intensity of light reflected by the crystal film is measured. The rate at which the material gases are introduced into the crystal growth chamber is adjusted to control the growth rate of the crystal film, the composition ratio of a mixed crystal thereof, and the density of the impurity therein.Type: GrantFiled: November 30, 1992Date of Patent: October 19, 1993Assignees: Research Development Corporation of Japan, Jun-ichi Nishizawa, Zaidan Hojin, Handotai Kenkyu ShinkokaInventors: Jun-ichi Nishizawa, Toru Kurabayashi
-
Patent number: 5017991Abstract: A thyristor device comprising an SI (Static induction) thyristor or beam base thyristor and an SIT (static induction transistor) or SIT-mode bipolar transistor connected to the gate of the thyristor in order to make it possible to turn-on and-off a direct current and voltage at a high speed with a light. In the thyristor part, the SIT gate structure or SIT-mode beam base structure exists in the first gate or base region or second gate or base region so that, at the time of the triggering operation, a very high switching efficiency will be obtained.Type: GrantFiled: October 14, 1988Date of Patent: May 21, 1991Assignee: Jun-Ichi NishizawaInventors: Jun-ichi Nishizawa, Takashige Tamamushi, Ken-ichi Nonaka
-
Patent number: 4791396Abstract: The present invention relates generally to a photodetector, and more particularly to a photodetector formed by a static induction transistor. The present invention includes the following constituent elements:In the photodetector formed by a static induction transistor, an n.sup.+ -type buried layer is provided, as a drain or source region of the photodetector, for limiting the thickness of a high resistivity i-type layer between a p.sup.+ -type region forming a gate and a substrate. Letting the wavelength of light incident to the surface of the photodetector and an absorption coefficient for the incident light be represented by .lambda..sub.i and .alpha..sub.i (.lambda..sub.i), respectively, the distance between the in junction of the abrupt pin junction and the surface of the photodetector x.sub.i is ##EQU1## the ratio between the area A(.lambda..sub.i) of each gate portion for selectively detecting light of the specified wavelength .lambda..sub.i and the total area A.sub.Type: GrantFiled: August 28, 1985Date of Patent: December 13, 1988Assignees: Jun-ichi Nishizawa, Takashige Tamamushi, Research Development CorporationInventors: Jun-ichi Nishizawa, Takashige Tamamushi, Istvan Barsony
-
Patent number: 4755856Abstract: A green color light emitting ZnSe diode having a pn junction is fabricated by the use of a ZnSe crystal having a good crystal perfection and being obtained by a solution growth method relying on the temperature difference technique using a solvent containing at least Te and Se and using atoms of at least one kind of impurity selected from Group Ib elements of the Periodic Table as a principal impurity for producing a p type region in the crystal.Type: GrantFiled: July 5, 1983Date of Patent: July 5, 1988Assignee: Jun-ichi NishizawaInventor: Jun-ichi Nishizawa
-
Patent number: 4684968Abstract: A solid state imaging element includes a semiconductor body consisting of a substrate of n.sup.+ conductivity type forming a drain region and of an epitaxial layer of n.sup.- conductivity type. In a surface of the epitaxial layer is a source region of n.sup.+ conductivity type and a signal storage gate region of p.sup.+ conductivity type. A transparent insulating film is provided on the signal storage gate region and on a portion of the surface of the epitaxial layer adjoining the signal storage gate region. A transparent gate electrode is provided on the insulating layer. Photocarriers generated in a depletion layer under the surface portion of the epitaxial layer by a light, which is incident through the transparent gate electrode and the transparent insulating layer, are stored in an inversion layer formed by a given bias voltage applied to the gate electrode.Type: GrantFiled: December 2, 1983Date of Patent: August 4, 1987Assignees: Olympus Optical Co., Ltd., Jun-ichi NishizawaInventors: Yoshinori Ohta, Jun-ichi Nishizawa
-
Patent number: 4651180Abstract: The present invention relates to a semiconductor FET or SIT type photoelectric transducer comprising a source and a drain which are main electrode regions of high impurity density; a high resistivity or intrinsic semiconductor region of the same conductivity type as the main electrode regions and formed therebetween as a current path; and a plurality of gate regions formed by high impurity density regions reverse in conductivity from the main electrode regions and formed in the current path, for controlling a main current; wherein the distance W.sub.1 between a first one of the gate regions on both sides of the source and the source or the drain is greater than the distance W.sub.2 between the other gate region and the source or drain (W.sub.1 >W.sub.2), and wherein the size of the first gate region is smaller than the diffusion length of carriers to be stored in the first gate region.Type: GrantFiled: December 9, 1983Date of Patent: March 17, 1987Assignee: Jun-ichi NishizawaInventors: Jun-ichi Nishizawa, Takashige Tamamushi, Kaoru Motoya
-
Patent number: 4626916Abstract: A solid state image pickup device having a shutter function is disclosed. The device comprises a plurality of picture cells each having a static induction transistor arranged in a matrix. The device further comprises a plurality of gate signal lines for simultaneously supplying gate signals to the picture cells placed on respective rows of the matrix, a vertical scanning register for generating and scanning the gate signals, a plurality of signal readout lines for reading out light signals stored in the picture cells placed on respective columns of the matrix, a shift register for simultaneously and temporarily storing read out signals and converting them into time series signals, a device connected between the signal readout means and the temporary storage means for controlling the connection therebetween.Type: GrantFiled: November 29, 1983Date of Patent: December 2, 1986Assignees: Olympus Optical Co., Ltd., Jun-ichi NishizawaInventors: Toyokazu Mizoguchi, Jun-ichi Nishizawa, Sohbe Suzuki, Takashige Tamamushi
-
Patent number: 4623909Abstract: An improved semiconductor photodetector of a type implemented with static induction transistors, and a method for driving such a device, in which data can be read out in a nondestructive mode. The static induction transistors of which the semiconductor photodetector is composed each include a gate region which forms boundaries with a channel region and in which carriers generated in response to incident light are accumulated. A structure for suppressing the depletion of carriers accumulated in the gate regions during reading of data is provided for each of the gate regions. This structure may take the form of an insulating layer which forms a potential barrier along the boundary between the gate regions and the channel region.Type: GrantFiled: February 28, 1984Date of Patent: November 18, 1986Assignee: Jun-ichi NishizawaInventors: Jun-ichi Nishizawa, Takashige Tamamushi
-
Patent number: 4593320Abstract: A two-dimensional solid-state image pickup device wherein, in order to make it possible to have a high light detecting sensitivity even to feeble lights and to stably and uniformly detect picture images, picture elements each formed of a static induction transistor having an optical gain of 10.sup.6 to 10.sup.8 and able to detect even such feeble lights as of about 10.sup.-4 .mu.W/cm.sup.2 and a gate capacitor are arranged in a matrix to be a gate accumulating system capable of two-dimensional reading out, the source regions of the respective static induction transistors are connected to common source lines, the respective source lines are connected to the ground through parallelly connected source line selecting transistors and capacitors and the gates of the respective source line selecting transistors are connected respectively to vertical address lines so that, simultaneously with the selection of the vertical address lines, the source lines may be connected to the ground.Type: GrantFiled: March 21, 1985Date of Patent: June 3, 1986Assignee: Jun-Ichi NishizawaInventors: Jun-ichi Nishizawa, Takashige Tamamushi
-
Patent number: 4587562Abstract: A solid state image pick-up device comprising a large number of picture cells arranged in a matrix. The picture cell comprises a first photoelectric conversion and readout SIT which comprises a gate region operating as a photoelectric conversion area and a second reset SIT which comprises a region (drain or source) electrically connected to the gate region of the first SIT, whereby the photoelectric charges stored in the gate regions of the first SITs of the picture cells in a matrix can be individually reset by means of the related second SITs.Type: GrantFiled: November 29, 1983Date of Patent: May 6, 1986Assignees: Olympus Optical Co., Ltd., Jun-Ichi NishizawaInventors: Masaharu Imai, Jun-ichi Nishizawa, Sohbe Suzuki, Takashige Tamamushi
-
Patent number: 4574310Abstract: A one-dimensional semiconductor imaging device in which each pixel in a linear array of devices is composed of but one transistor. The single transistor is an SIT (Static Induction Transistor) including a pair of principal electrode regions of one conduction type formed facing one another through a highly resistive channel region, and first and second gate regions of the other conduction type formed in contact with the channel region to control the current flowing between the two principal electrode regions. A transparent electrode is formed on at least one part of the first gate electrode through a capacitor. One of the two principal electrode regions, which are both common to all pixels, is connected to a video signal output terminal through a switch. The first gate region of each SIT is connected to a dedicated output through a capacitor.Type: GrantFiled: December 13, 1983Date of Patent: March 4, 1986Assignee: Jun-ichi NishizawaInventors: Jun-ichi Nishizawa, Takashige Tamamushi
-
Patent number: 4562474Abstract: A semiconductor image sensor which has photocells arranged in a matrix form is miniaturized and integrated with high density, thereby to increase its light amplification factor and operating speed. To this end, each photocell is formed by a static induction transistor which has a pair of main electrodes, a channel region formed between the main electrodes and a capacitor connected between a control region serving as a photocell and one of the row lines.Type: GrantFiled: August 16, 1983Date of Patent: December 31, 1985Assignee: Jun-ichi NishizawaInventor: Jun-ichi Nishizawa
-
Patent number: 4531156Abstract: A solid state image pickup device having an electronic shutter function is disclosed. The device comprises a plurality of picture cells each having a static induction transistor and arranged in a matrix, a plurality of vertical and horizontal scanning lines for scanning the cells, vertical and horizontal registers for generating scanning pulses which drive the vertical and horizontal scanning lines, a readout signal line for reading out light information stored in the cells, a reset signal line for resetting the cells, and a shutter speed control circuit for optionally setting in one frame period the timing of reset scanning pulses generated from a vertical register.Type: GrantFiled: December 1, 1983Date of Patent: July 23, 1985Assignees: Olympus Optical Company Limited, Jun-ichi NishizawaInventors: Jun-ichi Nishizawa, Sohbe Suzuki, Takashige Tamamushi, Yasuo Arisawa
-
Patent number: 4526632Abstract: A method of forming a pn junction with a Group IIB-VIB compound semiconductor containing Zn is disclosed, the method including preparing an n type semiconductor region either locally or entirely in a Group IIB-VIB compound semiconductor crystal obtained by relying on a crystal growth method in liquid phase using a temperature difference technique, and subjecting this crystal to a thermal annealing in a Zn solution or in a Zn atmosphere to produce an n type region. Crystal growth is conducted while controlling the vapor pressure of the constituent Group IVB element to produce a p type region. A combination of all these steps gives a more stable pn junction.Type: GrantFiled: February 9, 1983Date of Patent: July 2, 1985Assignee: Jun-Ichi NishizawaInventors: Jun-ichi Nishizawa, Kazuomi Ito, Yasuo Okuno
-
Patent number: 4389256Abstract: A method of manufacturing a pn junction in a substantially n-type ZnSe compound semiconductor crystal grown by relying on a liquid growth method using temperature difference technique, by diffusing therein gold which is a p-type impurity or by forming therein a gold alloy in an inert gas atmosphere. This impurity has such a high diffusion velocity as can suppress the vaporization, from ZnSe crystal, of Se atoms having a vaporization speed lower than the diffusion speed of gold, and thus desired pn junction can be formed.Type: GrantFiled: June 5, 1981Date of Patent: June 21, 1983Assignee: Jun-ichi NishizawaInventors: Jun-ichi Nishizawa, Kazuomi Ito