Abstract: A layer 2 transport network, and components thereof, supporting virtual network functionality among customer edge devices. Virtual private network configuration can be accomplished with merely local intervention by preprovisioning extra channel (or circuit) identifiers at each customer edge device and by advertising label base and range information corresponding to a list of channel (or circuit) identifiers.

Abstract: A device may obtain a flow signature, identify a destination collector to which packets bearing the flow signature are sent, obtain a list of potential source collectors that may have sent the packets bearing the flow signature to the destination collector, and identify a source collector, among the potential source collectors, that sent the packets to the destination collector. In addition, the device may output information related to a path from the source collector the destination collector.

Abstract: In an asynchronous transfer mode switch, a plurality of queues is provided for accumulating transfer cells, and a queue assignment processing section, receives a message for establishing a connection and assigns to the connection one of the queues having a forwarding rate close to a declared rate included in the message and not exceeding the declared rate.

Abstract: A device may include a service activation engine (SAE) including: a policy information base (PIB) file that defines a plurality of attachments that correspond to a plurality of network policies; and a server. The server may receive a request, using common open policy service for policy provisioning (COPS-PR), for a network service related to an interface handle associated with a subscriber device; determine which ones of the network policies correspond to the network service; and send, using COPS-PR, a provisioning instance (PRI) including a first of the attachments to implement the ones of the network policies to the interface handle based on the attachments.

Abstract: A computing device may include a memory to store instructions and a processor. The processor may execute the instructions to conduct an initial cell optimization for an integrated circuit layout; designate clock loads associated with a first-level clock buffer; receive, after the initial standard-cell optimization, a set of initial placement locations; align the clock loads according to the set of placement locations; conduct, using the aligned clock loads, a re-optimization of the integrated circuit layout; and store, in the memory, a circuit layout based on the re-optimization.

Abstract: A system for determining the burst start timing of a signal includes logic configured to receive the signal, generate correlation moduli and generate a first timing output based on the correlation moduli. The logic may also be configured to receive operating mode information and timing information and generate search controls. The logic may further be configured to identify a maximum of the correlation moduli using the search controls and determine a second timing output associated with the maximum correlation modulus. The second timing output represents a more accurate approximation of a burst start time than the first timing output.

Abstract: A device includes a memory, flow table logic, sampling logic, and a processing unit. The memory is configured to store a flow table that stores, as a number of entries, statistics regarding a number of data flows. The flow table logic is configured to generate records corresponding to data flows for which entries are created in the flow table or removed from the flow table. The sampling logic is configured to select one of the data flows for sampling and sample initial data units for the one of the data flows. The processing unit is configured to receive the records generated by the flow table logic, receive the initial data units sampled by the sampling logic, analyze the initial data units to generate analysis results, correlate the records and the analysis results associated with a same one of the data flows, and store the correlated records and analysis results.

Abstract: A data flow rate policer enforces data flow policies for a number of data flows using a probabilistic policy enforcement mechanism. The policer includes a memory that stores the state of each data flow in a compact data structure. Additionally, the policer includes one or more policing engines that implement the actual data flow policies based on information derived from the data structures. The policing engines may be implemented in hardware to increase performance.

Abstract: Techniques are described for distributing network traffic across parallel data paths. For example, a router may perform a hash on routing information of the packet to generate a hash value corresponding to the packet flow associated with the packet. The router may map the hash value of the packet to a forwarding element associated with a data path. The router may dynamically update the mapping of hash values to forwarding elements in accordance with traffic flow statistics. In this manner, the router may distribute the packet flows from data paths with high volumes of traffic to data paths with smaller volumes of traffic. The router may further prevent out of sequence delivery of packets by updating the mapping upon a gap in the packet flow exceeding a threshold gap. For example, the router may update the mapping when a packet for a packet flow associated with the particular hash value has not been received for at least a defined time interval.

Abstract: A scheduler allowing high-speed scheduling scalable with the number of input and output ports of a crosspoint switch and suppressed unfairness among inputs is disclosed. The scheduler includes an M×M matrix of scheduling modules, each of which schedules packet forwarding connections from a corresponding input group of input ports to selected ones of a corresponding output group of output ports based on reservation information. A diagonal modulo pattern is used to determine a set of M scheduling modules to avoid coming into collision with each other. Each determined scheduling module performs reservation of packet forwarding connections based on current reservation information and transfers updated reservation information in row and column directions of the M×M matrix.

Abstract: The present invention relates to workflow systems and methods. In one embodiment, the invention relates to integration of a calendar system with a workflow system where a calendar event can initiate a workflow by sending a message to a form route manager. The completion of a workflow or step in the workflow can result in sending a message to a calendar system to generate an event. In another embodiment, the invention relates to the integration of workflow with a project management system that includes project segments, which are processes that can be defined and controlled by workflow routes. The project management system sends a message to the workflow system to initiate workflow and the workflow system sends a message to the project management system, for example, at the completion of the workflow route. The relationship between the workflow routes can maintain the relationship between the project segments.

Abstract: In general, techniques are described to increase customer awareness within a network device of a cable network. Based on this increased awareness, a layer 3 network device, such as a router, may apply services that augment services applied by a Cable Modem Termination System (CMTS). The network device may be positioned between the CMTS and a backend network of the cable network. The network device may include a control unit to access the CMTS to determine network information and at least one network interface that receives network traffic. The control unit may apply at least one of a plurality of services provided by the network device to the network traffic based on the network information learned from the CMTS. Often, at least one of the differentiated services may comprise a service not provided by the CMTS and, consequently, a service that may augment those services currently provided by the CMTS.

Abstract: In one embodiment, an apparatus can include a policy vector module configured to retrieve a compressed policy vector based on a portion of a data packet received at a multi-stage switch. The apparatus can also include a decompression module configured to receive the compressed policy vector and configured to define a decompressed policy vector based on the compressed policy vector. The decompressed policy vector can define a combination of bit values associated with a policy.

Abstract: A router comprises an interface for receiving packets, wherein the packets include Multiprotocol Label Switching (MPLS) labels having the same label value that corresponds to an MPLS label switched path (LSP), and wherein each of the MPLS packets includes MPLS experimental (EXP) bits defined to identify a class of service to which the respective packet belongs. The router is a transit router along the MPLS LSP, and further includes a control unit that, for each of the packets, accesses forwarding information to determine whether to forward the packet along the LSP or to redirect the packet along a second LSP based on the classes of service specified in the EXP bits. The router receives policies via a user interface, and applies the policies to index into the forwarding information to select a forwarding entry, wherein the index is responsive to the label value in combination with the EXP bits.

Abstract: A delay variation buffer controller allowing proper cell delay variation control reflecting an actual network operation status is disclosed. A detector detects an empty status of the data buffer when data is read out from the data buffer at intervals of a controllable time period. A counter counts the number of contiguous times the empty status was detected. A proper time period is calculated depending on a value of the counter at a time when the empty status is not detected and the value of the counter is not zero. A timing corrector corrects the controllable time period to match the proper time delay and setting the controllable time delay to a predetermined value when the empty status is not detected and the value of the counter is zero.

Abstract: A high speed transmission system transfers data streams over a plurality of data links. Each data link may carry a number of bit streams. A clock signal is not transmitted over the optical link. Instead, an indication of the appropriate clock signal frequency and phase is embedded in the transmitted data. At the receiving end, a clock signal of an appropriate frequency and phase is generated. The new clock signal is used to sample and reconstruct the original data streams.

Abstract: A system uses software to perform a first portion of a linked list traversal process, where the first portion obtains a pointer that corresponds to a key and where the pointer points into a linked list. The system further uses hardware and the obtained pointer to perform a second portion of the linked list traversal process, where the second portion locates data from the linked list that is associated with the key.

Abstract: An endpoint defense system uses endpoint health indicators and user identity information to provide fine-grain access control over network resources. For example, the endpoint defense system may include a controller, a set of protection devices, and a set of agents. The agents are software applications installed on a set of endpoints to gather the health information that represents security states of the endpoint devices. The agents send updated health information to the controller. In response to a login attempt, the controller processes the health indicators and identity information through a set of administrator-defined policies to generate a set of access rights. The controller transfers the set of access rights to the protection devices. The protection devices then control user access to network resources according to the set of access rights. The controller sends updated sets of access rights to the protection devices whenever the access rights change.

Abstract: A first-in-first-out (FIFO) queue optimized to reduce latency in dequeuing data items from the FIFO. In one implementation, a FIFO queue additionally includes buffers connected to the output of the FIFO queue and bypass logic. The buffers act as the final stages of the FIFO queue. The bypass logic causes input data items to bypass the FIFO and to go straight to the buffers when the buffers are able to receive data items and the FIFO queue is empty. In a second implementation, arbitration logic is coupled to the queue. The arbitration logic controls a multiplexer to output a predetermined number of data items from a number of final stages of the queue. In this second implementation, the arbitration logic gives higher priority to data items in later stages of the queue.

Abstract: In general, techniques are described for summarizing label mappings and thereby enabling longest-prefix match within Multi-Protocol Label Switching (MPLS) networks. More specifically, a first router included within a first area of a network comprises a control unit that maintains a label space defining labels available for mapping to a plurality of addresses assigned to network devices within the network. The control unit reserves a contiguous set of the labels of the label space and maps the contiguous set of labels to first area addresses. The first area addresses include those addresses of the plurality of addresses available for assignment to network devices within the first area. The first router also includes an interface card that transmits, to a second router of a second area of the network, an advertisement that advertises a summarized version of the mapping between the contiguous set of labels and the first area addresses.