Patents Assigned to Kabushiki Kaisha Shinano Electronics
  • Patent number: 5901829
    Abstract: An object of the present invention is to provide a method of positioning ICs and an IC handler utilizing the method in which a vertical mechanism is not provided in a positioning mechanism. In the IC handler, a positioning wall piece encloses a table, it has two pairs of inner faces, each pair of which are facing each other, lower portions S of each pair are formed into vertical faces and mutually separated with a distance corresponding to outermost edges of the IC, upper portions T of each pair are formed into slope faces whose distance is gradually made longer in an upward direction. An elastic member elastically supports the positioning wall piece, which is capable of moving vertically.
    Type: Grant
    Filed: April 2, 1997
    Date of Patent: May 11, 1999
    Assignee: Kabushiki Kaisha Shinano Electronics
    Inventor: Masato Ito