Patents Assigned to KABUSHIKI KAISHA TOSHIBA, AJINOMOTO CO., INC.
  • Publication number: 20010010274
    Abstract: A plain layer in a forming area of a measuring wiring pattern is patterned so that its copper-containing amount may be coincided with a copper-containing amount in a forming area of a measurement target signal wiring pattern. Thereby, it is possible to coincide a thickness of an insulating layer in the forming area of the measuring wiring pattern with a thickness of the insulating layer in the forming area of the measurement target signal wiring pattern, thus reducing a measuring error of the characteristic impedance based on a difference of a thickness of the insulating layer. Using the measuring wiring pattern, it is possible to measure a correct characteristic impedance of the measurement target signal wiring pattern.
    Type: Application
    Filed: January 30, 2001
    Publication date: August 2, 2001
    Applicant: KABUSHIKI KAISHA TOSHIBA, AJINOMOTO CO., INC.
    Inventors: Yuichi Koga, Takahiro Deguchi, Shigeo Nakamura