Patents Assigned to KABUSHIKI KAISHA TOSHIBA and
  • Patent number: 7852946
    Abstract: A video encoding method includes selecting one combination, for each block of an input video signal, from a plurality of combinations. Each combination includes a predictive parameter and at least one reference picture number determined in advance for the reference picture. A prediction picture signal is generated in accordance with the reference picture number and predictive parameter of the selected combination. A predictive error signal is generated representing an error between the input video signal and the prediction picture signal. Encoding the predictive error signal, information of the motion vector, and index information indicating the selected combination is included.
    Type: Grant
    Filed: July 28, 2009
    Date of Patent: December 14, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takeshi Chujoh, Shinichiro Koto, Yoshihiro Kikuchi
  • Patent number: 7852791
    Abstract: A wireless communication apparatus performs bi-directional communication with an initiator. The apparatus is allocated an allocation period for data transmission from the initiator. The apparatus includes means for generating a first physical frame including an acknowledgement frame with respect to data received from the initiator, and generating a second physical frame in which a plurality of transmission data frames addressed to the initiator are aggregated. The apparatus also includes means for transmitting the first physical frame at a first transmission rate and the second physical frame at a second transmission rate, during the allocation period.
    Type: Grant
    Filed: August 30, 2007
    Date of Patent: December 14, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tetsu Nakajima, Tomoko Adachi, Masahiro Takagi, Tomoya Tandai, Yoriko Utsunomiya, Toshihisa Nabetani
  • Patent number: 7852943
    Abstract: A video encoding method includes selecting one combination, for each block of an input video signal, from a plurality of combinations. Each combination includes a predictive parameter and at least one reference picture number determined in advance for the reference picture. A prediction picture signal is generated in accordance with the reference picture number and predictive parameter of the selected combination. A predictive error signal is generated representing an error between the input video signal and the prediction picture signal. Encoding the predictive error signal, information of the motion vector, and index information indicating the selected combination is included.
    Type: Grant
    Filed: July 23, 2009
    Date of Patent: December 14, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takeshi Chujoh, Shinichiro Koto, Yoshihiro Kikuchi
  • Patent number: 7853761
    Abstract: According to one embodiment, a magnetic disk apparatus comprises a volatile memory for storing write commands and data accompanying the commands supplied from a host system, and a flush control unit for classifying the write commands into a first group of commands and a second group of commands based on a time required to write the data accompanying the commands on a magnetic disk, writing the data accompanying the first group of commands to the magnetic disk, and writing the second group of commands and the data accompanying the second group of commands to a nonvolatile memory.
    Type: Grant
    Filed: December 17, 2007
    Date of Patent: December 14, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tomonori Masuo
  • Patent number: 7853039
    Abstract: In a workflow management system for managing a workflow processing in which a processing object is document data read and digitized by an image reading apparatus, a technique to improve processing efficiency in the workflow processing is provided. The workflow management system includes a document data acquisition unit to acquire, as the processing object in the workflow processing, the document data made to correspond to reliability information as information indicating reliability of an image reading processing in the image reading apparatus, a reliability information acquisition unit to acquire the reliability information made to correspond to the document data acquired by the document data acquisition unit, and a processing execution unit to execute, based on the reliability information acquired by the reliability information acquisition unit, a specified processing relating to an approval processing in the workflow concerning the document data acquired by the document data acquisition unit.
    Type: Grant
    Filed: January 29, 2007
    Date of Patent: December 14, 2010
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Tec Kabushiki Kaisha
    Inventor: Kazunori Hirabayashi
  • Patent number: 7852917
    Abstract: A video encoding apparatus includes selecting one combination, for each block of an input video signal, from a plurality of combinations. Each combination includes a predictive parameter and at least one reference picture number determined in advance for the reference picture. A prediction picture signal is generated in accordance with the reference picture number and predictive parameter of the selected combination. A predictive error signal is generated representing an error between the input video signal and the prediction picture signal. Encoding the predictive error signal, information of the motion vector, and index information indicating the selected combination is included.
    Type: Grant
    Filed: July 29, 2009
    Date of Patent: December 14, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takeshi Chujoh, Shinichiro Koto, Yoshihiro Kikuchi
  • Patent number: 7852920
    Abstract: A video encoding method includes selecting one combination, for each block of an input video signal, from a plurality of combinations. Each combination includes a predictive parameter and at least one reference picture number determined in advance for the reference picture. A prediction picture signal is generated in accordance with the reference picture number and predictive parameter of the selected combination. A predictive error signal is generated representing an error between the input video signal and the prediction picture signal. Encoding the predictive error signal, information of the motion vector, and index information indicating the selected combination is included.
    Type: Grant
    Filed: June 9, 2009
    Date of Patent: December 14, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takeshi Chujoh, Shinichiro Koto, Yoshihiro Kikuchi
  • Patent number: 7852685
    Abstract: A semiconductor memory device comprises a first exclusive-OR circuit which compares mth N-bit first data with (m+1)th N-bit second data, a majority circuit which generates flag data to invert the second data if a comparison result of the first exclusive-OR circuit indicates that the number of mismatch bits between the first data and the second data is not less than N/2, and generates flag data to noninvert the second data if the number of mismatch bits between the first data and the second data is less than N/2, a second exclusive-OR circuit which inverts or noninverts the second data based on the flag data, a shift register which stores the flag data generated by the majority circuit, and a pad to serially output both the inverted or noninverted second data and the flag data.
    Type: Grant
    Filed: March 18, 2009
    Date of Patent: December 14, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kiyoaki Iwasa, Mitsuaki Honma
  • Patent number: 7852928
    Abstract: A video encoding apparatus includes selecting one combination, for each block of an input video signal, from a plurality of combinations. Each combination includes a predictive parameter and at least one reference picture number determined in advance for the reference picture. A prediction picture signal is generated in accordance with the reference picture number and predictive parameter of the selected combination. A predictive error signal is generated representing an error between the input video signal and the prediction picture signal. Encoding the predictive error signal, information of the motion vector, and index information indicating the selected combination is included.
    Type: Grant
    Filed: June 26, 2009
    Date of Patent: December 14, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takeshi Chujoh, Shinichiro Koto, Yoshihiro Kikuchi
  • Patent number: 7852320
    Abstract: According to one embodiment, an optical position detection IC outputs, in accordance with movement of an object on a detection area including a light-transmissive area which is disposed on a top surface of a housing. A control module controls a movement direction and a movement amount of a cursor, which is displayed on a display screen of a display device, based on an attitude signal which indicates in which of two directions the optical position detection IC is disposed, and movement amount information which is output from the optical position detection IC.
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: December 14, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hironori Motoe, Takashi Iwai
  • Patent number: 7852925
    Abstract: A video encoding apparatus includes selecting one combination, for each block of an input video signal, from a plurality of combinations. Each combination includes a predictive parameter and at least one reference picture number determined in advance for the reference picture. A prediction picture signal is generated in accordance with the reference picture number and predictive parameter of the selected combination. A predictive error signal is generated representing an error between the input video signal and the prediction picture signal. Encoding the predictive error signal, information of the motion vector, and index information indicating the selected combination is included.
    Type: Grant
    Filed: June 25, 2009
    Date of Patent: December 14, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takeshi Chujoh, Shinichiro Koto, Yoshihiro Kikuchi
  • Patent number: 7850156
    Abstract: A sheet finisher of the invention includes a saddle stitch unit configured to stitch a center of a sheet bundle in which printed sheets are bundled, a fold unit configured to fold the center stitched by the saddle stitch unit and to form a fold line, and a fold reinforcing unit configured to reinforce the fold line formed by the fold unit, the fold reinforcing unit includes a roller unit that includes a reinforce roller with a structure for preventing an occurrence of a wrinkle, and moves along a direction of the fold line while applying pressure by the reinforce roller to the fold line of the sheet bundle transported from the fold unit, and a drive unit configured to move the roller unit along the direction of the fold line from a standby position located at a position separate from an end of the sheet bundle.
    Type: Grant
    Filed: April 17, 2008
    Date of Patent: December 14, 2010
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Tec Kabushiki Kaisha
    Inventors: Ken Iguchi, Katsuya Sasahara, Takahiro Kawaguchi, Hiroyuki Taguchi, Katsuhiko Tsuchiya
  • Patent number: 7853123
    Abstract: With this invention, at least one of a video file containing video information, a still picture file containing still picture information, and an audio file containing audio information and a management file having management information on a control method of reproducing the information in the file are recorded on an information storage medium. This realizes a data structure that causes the recording and deleting places on the information storage medium to correspond spuriously to places on a single tape, such as a VTR tape. Use of the data structure provides users with an easy-to-use interface.
    Type: Grant
    Filed: August 16, 2006
    Date of Patent: December 14, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideo Ando, Hiroaki Unno
  • Patent number: 7852675
    Abstract: A three dimensional stacked nonvolatile semiconductor memory according to an example of the present invention includes a memory cell array comprised of first and second blocks disposed side by side in a first direction, and a driver disposed on one end of the memory cell array in a second direction orthogonal to the first direction. First select gate lines in the first block and first select gate lines in the second block are connected to the driver after they are commonly connected in one end in the second direction of the memory cell array in a relation of one to one.
    Type: Grant
    Filed: March 18, 2009
    Date of Patent: December 14, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hiroshi Maejima
  • Patent number: 7852924
    Abstract: A video encoding apparatus includes selecting one combination, for each block of an input video signal, from a plurality of combinations. Each combination includes a predictive parameter and at least one reference picture number determined in advance for the reference picture. A prediction picture signal is generated in accordance with the reference picture number and predictive parameter of the selected combination. A predictive error signal is generated representing an error between the input video signal and the prediction picture signal. Encoding the predictive error signal, information of the motion vector, and index information indicating the selected combination is included.
    Type: Grant
    Filed: June 10, 2009
    Date of Patent: December 14, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takeshi Chujoh, Shinichiro Koto, Yoshihiro Kikuchi
  • Patent number: 7851849
    Abstract: A nonvolatile semiconductor storage device includes: a plurality of stacked units juxtaposed on a major surface of a substrate, each stacked unit aligning in a first direction parallel to the major surface of the substrate; and a gate electrode aligning parallel to the major surface in a second direction non-parallel to the first direction. Each of the plurality of stacked units includes a plurality of stacked semiconductor layers via an insulating layer. The plurality of stacked units are juxtaposed so that the spacings between adjacent stacked units are alternately a first spacing and a second spacing larger than the first spacing. The second spacing is provided at a periodic interval four times a size of a half pitch F of the bit line. The gate electrode includes a protruding portion that enters into a gap of the second spacing between the stacked units.
    Type: Grant
    Filed: June 2, 2009
    Date of Patent: December 14, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Masahiro Kiyotoshi
  • Patent number: 7851007
    Abstract: The present invention provides a rush juice powder which is mainly made from rush containing a high percentage of dietary fiber and having an antibacterial function and an anti-inflammatory function, has an extremely high function to eliminate active oxygen through interaction with a matcha (powdered green tea) in addition to the original functions of rush, and further is easy to drink. A rush juice powder contains a powdered rush which is made by soaking a rush in hot water for a blanching treatment, drying the blanched rush by hot-air and then pulverizing the dried rush. Both a matcha (powdered green tea) and a cyclic oligosaccharide are blended at a respectively determined ratio to the powdered rush.
    Type: Grant
    Filed: November 8, 2007
    Date of Patent: December 14, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Osamu Shimada
  • Patent number: 7852691
    Abstract: A semiconductor memory device comprises a plurality of submacros mutually connected via global data lines. Each of the submacros includes a first and a second memory block, and a memory block control circuit arranged between the first and second memory blocks. The memory block control circuit includes a DQ buffer block connected to the first memory block via first complementary data lines and connected to the second memory block via second complementary data lines. It also includes a dynamic data shift redundancy circuit block connected to the DQ buffer block via local data lines and operative to relieve the first and second memory blocks.
    Type: Grant
    Filed: September 12, 2008
    Date of Patent: December 14, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takayuki Iwai, Mariko Iizuka
  • Patent number: 7853365
    Abstract: A system manages an optimal load distribution of a total output of a power plant composed of a plurality of units. Plant specifications data of each unit required for optimal load distribution is input and stored. Optimal load distribution calculating carries out a calculation based on data stored. The result of the calculation is stored. A sending-end characteristic curve, a fuel cost curve, a curve of the load optimally distributed to each unit versus the total output, a fuel cost curve for the total output, and fuel cost curves for comparison between a conventional load distribution and the optimal load distribution based on stored data are displayed. An optimal load distribution schedule displays a power transmission time schedule table, a power transmission time schedule curve, and a fuel cost comparison table for different operating schemes.
    Type: Grant
    Filed: April 30, 2008
    Date of Patent: December 14, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tetsuya Iwamoto, Tsuneo Watanabe
  • Patent number: 7853836
    Abstract: A semiconductor integrated circuit includes a clock generator which generates a first clock, a test data generator which modulates a phase of the first clock, and generates test data to which jitter is added by using the modulated clock, a data extractor which samples the test data and extracts recovery data, and a detector which detects an error of the recovery data.
    Type: Grant
    Filed: March 13, 2008
    Date of Patent: December 14, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Shuichi Takada