Abstract: Disclosed is a method of forming a thin film on a substrate surface by a CVD method, including the steps of arranging a substrate such that one main surface of the substrate is exposed to a closed space, and decomposing by heating a raw material gas filling the closed space so as to form a thin film containing at least one element constituting the raw material gas on the main surface of the substrate, the raw material gas containing a gas component generated by heating a material, which is solid or liquid at room temperature, arranged within the closed space.

Abstract: A distributed feedback laser comprising: waveguide (4) having a hologram (10) capable of emitting radiation mode light in upper and lower directions; first reflector (20) provided below said waveguide for returning said radiation mode light back to said waveguide; and second reflector (21A, 21B, 21C, 21D, 21E) provided above said waveguide for returning said radiation mode light back to said waveguide, intensity profile of said radiation mode light on said waveguide being non-uniform is disclosed. Also, by using 2nd- or higher-order diffraction gratings having an asymmetric cross-sectional configuration together with a reflection structure located at one side thereof, a highly directional optical isolator can be provided.

Abstract: The apparatus for converting a differential input voltage to two fully balanced output currents is achieved by providing a common mode control circuit of a simplified circuit construction to an operational transconductance amplifier. The apparatus includes an operational transconductance amplifier that is comprised of an OTA input section for converting two input voltages of the differential input voltage to a pair of interim output currents and an OTA output section for converting the interim output currents to the output currents, and a common mode controlling circuit for providing a control voltage to the OTA.

Abstract: There is provided a MISFET which suppresses a short-channel effect in a deep submicron region and has a low parasitic resistance, a low parasitic capacitance, and a small drain junction leakage current. A shallow concave is formed in a channel forming portion and an extension region forming portion of a MISFET, shallow ion implantation for forming an extension region is performed to a bottom surface of the shallow concave. Deep ion implantation for forming a source/drain region is performed to a silicon substrate adjacent to the concave, and the position of a peak concentration of the shallow ion implantation is caused to coincide with the position of a peak concentration of the deep ion implantation, so that a MISFET which suppresses a short-channel effect and has a low source/drain parasitic resistance, a low source/drain parasitic capacitance, and a small drain junction leakage current generated by SALICIDE steps can be provided.

Abstract: A method of decoloring an image formed on a paper sheet by using an image forming material containing a color former, a developer and a decolorizer, comprising the steps of bringing a solvent into contact with the image forming material for decoloring the image, and removing the residual solvent from the paper sheet.

Abstract: An interconnector line of thin film comprising 0.001 to 30 at % of at least one kind of a first element capable of constituting an intermetallic compound of aluminum and/or having a higher standard electrode potential than aluminum, for example, at least one kind of the first element selected from Y, Sc, La, Ce, Nd, Sm, Gd, Tb, Dy, Er, Th, Sr, Ti, Zr, V, Nb, Ta, Cr, Mo, W, Mn, Tc, Re, Fe, Co, Ni, Pd, Ir, Pt, Cu, Ag, Au, Cd, Si, Pb and B; and one kind of a second element selected from C, O, N and H in a proportion of 0.01 at ppm to 50 at % of the first element, with the balance comprising substantially Al. In addition to having low resistance, such an Al interconnector line of thin film can prevent the occurrence of hillocks and the electrochemical reaction with an ITO electrode. The interconnector line of thin film can be obtained by sputtering in a dust-free manner by using a sputter target having a similar composition.

Abstract: A frequency synthesizer has a voltage controlled oscillator to generate a oscillation signal of a frequency corresponding to a control voltage, a divider to divide the oscillation signal and to generate a dividing signal, a reference signal oscillator to generate a reference signal, a phase comparator to obtain a phase error between the reference signal and the dividing signal, and a filter to smooth the comparison result of the phase comparator and generate the control voltage, in which the divider comprises a swallow counter which times a switching time of a number of dividings, a prescaler to divide the oscillation signal by the number of dividings corresponding to the switching time timed with the swallow counter, a variable divider to divide a dividing result of the prescaler by a number of dividings set by a user, and a dividing number change controller to change a relation between the number of dividings and a switching time of the numbers of dividings in the prescaler.

Abstract: A translation system and method of translating information, such as a homepage, written in a first language into a second language, when the information is written in accordance with a markup language grammar and provided by an information providing apparatus, such as a server computer connected to the Internet.

Abstract: A first via land of a wiring layer on a first surface of a first insulation layer that is a rigid layer and a second via land of a wiring layer on a second surface of a second insulation layer that is a flexible layer are electrically and mechanically connected with a conductive pillar pierced through a third insulation layer disposed between the first insulation layer and the second insulation layer. In such a structure, a wiring board that can mount a highly integrated semiconductor device, that is small and thin, and that has high reliability can be accomplished.

Abstract: In NAND type EEPROM capable of high-speed rewriting by ensuring that the memory cell current during write verify read-out operation is larger than that during normal data read-out operation, a NAND cell is composed of a plurality of serially connected memory cells (MC0 through MC31) and selection transistors (SST and GST). During data write operation, a voltage (Vpgm) is applied to a selected word line of a selected block, and a pass voltage (Vpass2) is applied to non-selected word lines to introduce electrons to the floating gate of the selected memory cell. In verify read-out operation after data write operation, a verify read-out voltage is applied to the selected word line and a pass voltage (Vpass3) to non-selected word lines. The pass voltage (Vpass3) applied to non-selected word lines during verify read-operation is higher than the pass voltage (Vpass1) applied to non-selected word lines during normal data read-out operation.

Abstract: A satellite communication antenna apparatus for performing communication with a communication satellite, comprises a spherical radio wave lens, an arcuate guide unit arranged along an outer surface of the radio wave lens and having a central point common with the radio wave lens, an antenna unit reciprocally movable along the guide unit, and an antenna positioning unit for positioning the antenna unit, wherein the guide unit is made of a material with a low specific dielectric constant.

Abstract: A video encoding apparatus is provided with a resolution converting section, an encoding section, and a transmitting section. The resolution converting section enlarges or reduces a binary picture which represents the shape of an object. The encoding section encodes a binary picture reduced by the resolution converting section. The reduction ratio used by the resolution converting section is encoded, and the transmitting section transmits this encoded reduction ratio along with encoded data on the binary picture. The amount of encoded data produced from the encoding section is controlled by changing the enlargement/reduction ratio used by the resolution converting section.

Abstract: In this DRAM, an SiO2 film for assuring the step coverage of cell-capacitor of cylinder type is left remained only in the peripheral circuit region. The capacitor upper electrode is formed extending from the memory cell array region to the peripheral circuit region. Since the capacitor upper electrode in the peripheral circuit region is disposed higher than the upper surface of the capacitor upper electrode which constitutes the cell-capacitor, this capacitor upper electrode in the peripheral circuit region is employed as a stopper for subsequently flattening the interlayer insulating film. Subsequently, the interlayer insulating film is employed as a mask for etching the capacitor upper electrode in the peripheral circuit region.

Abstract: A video encoding apparatus is provided with a resolution converting section, an encoding section, and a transmitting section. The resolution converting section enlarges or reduces a binary picture which represents the shape of an object. The encoding section encodes a binary picture reduced by the resolution converting section. The reduction ratio used by the resolution converting section is encoded, and the transmitting section transmits this encoded reduction ratio along with encoded data on the binary picture. The amount of encoded data produced from the encoding section is controlled by changing the enlargement/reduction ratio used by the resolution converting section.

Abstract: A life support apparatus comprising a vital information sensor attached to a body to acquire vital information of a user, a behavior information sensor attached to the body to acquire behavior information of the user, a situation recognition device which recognizes a user's situation based on the behavior information acquired by the behavior information sensor and the vital information acquired by the vital information sensor to generate user's situation information, a data base which stores stress management information are prepared in advance, an information search device which searches the data base for stress management information corresponding to the user's situation information, and an information presentation device which presents the stress management information obtained by the information search device to the user.

Abstract: A combined cycle power plant including a gas turbine plant, a heat recovery steam generator, and a steam turbine plant. The heat recovery steam generator includes a main stream side steam piping, a bypass side steam piping, a steam branching to branch a steam flowing from a former stage in the heat recovery steam generator into two steams, one as a main stream side steam and another as a de-superheating steam, and a steam merging portion to merge the main stream side steam superheated by the high pressure superheater and the de-superheating steam passed through the bypass side steam piping. The heat recovery steam generator is provided with a blocking prevention function to prevent blocking of the main stream side steam piping and the bypass side steam piping and a thermal stress generation protection function.

Abstract: A method of manufacturing a semiconductor device which includes forming a first SiGe layer having a low content of Ge, forming an oxide layer by implanting oxygen ions into the first SiGe layer, and then annealing the first SiGe layer. The method also includes forming, on the first SiGe layer, a second SiGe layer which has a higher content of Ge than the first SiGe layer, forming a strained Si layer on the second SiGe layer, and forming a field effect transistor in which the strained Si layer is used a channel region. Further, a field effect transistor may be formed on a semiconductor substrate having an indefectible, high-quality, buried oxide layer and a largely strained Si layer, and hence a high-speed, low-power-consumption semiconductor device can be realized.

Abstract: A data acquisition and transmitting unit samples the signal indicating the apparatus state quantity from a sensor provided on an apparatus, converts the signal into absolute-time-tagged monitoring data S(t), stores the data S(t), and transmits the data S(t) to a network. A digital protection and control unit takes in the quantity data E about the system of the apparatus and the operating state data P about the apparatus, converts these data into absolute-time-tagged data E(t) and operating state data P(t), stores these converted data, and transmits these data E(t) and P(t) to the network. A data display unit receives the data S(t), E(t), and P(t) from the data acquisition and transmitting unit and digital protective and control unit via the network and displays the state of the apparatus on the basis of the data S(t), E(t), and P(t).

Abstract: An address buffer includes a latch circuit, and is controlled by an internal clock signal sent from a clock buffer. A decoding circuit section for selecting a word line is formed of a predecoder and a row decoder for further decoding a decoded output from the predecoder. The predecoder has no latching function, and the row decoder has a latch circuit. A pulse generating circuit generates two timing pulses based on a clock signal CK1. The activation of the row decoder is controlled by the two timing pulses.

Abstract: A plurality of semiconductor chips bent along the outer circumferential surface of a cylindrical substrate are mounted to the outer circumferential surface of the substrate. The bumps of these semiconductor chips are connected to connection pads formed on the outer circumferential surface of the substrate. By diminishing the curvature radius of the bent semiconductor chips, the size of the semiconductor module can be made smaller than the size of the chip.