Patents Assigned to Kabushiki Kaisha Tosiba
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Publication number: 20200282565Abstract: A transport device according to an embodiment includes a holder, a driver, a force sensor, a first acquirer, and a controller. The holder holds cargo. The driver, which is a driver connected to the holder, moves the holder. The force sensor, provided in the vicinity of a connection location where the holder and the driver are connected to each other, detects a force applied to the vicinity of the connection location. The first acquirer acquires holding information indicating a holding state of the holder holding the cargo. The controller transports the cargo to the driver in a case where it is determined that the driver is caused to transport the cargo, on the basis of holding information indicating a holding state of the holder which is acquired by the first acquirer and detection results of the force sensor.Type: ApplicationFiled: September 14, 2017Publication date: September 10, 2020Applicants: Kabushiki Kaisha Tosiba, Toshiba Infrasturcture Systems & Solutions CorporationInventor: Hideichi NAKAMOTO
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Patent number: 8885414Abstract: A nonvolatile semiconductor memory device of an embodiment includes a p-type semiconductor substrate, a first P-well formed in the semiconductor substrate, and on which a plurality of memory cells is formed, an first N-well surrounding the first P-well and electrically separating the first P-well from the semiconductor substrate, a first negative voltage generation unit configured to generate a first negative voltage, a boost unit configured to boost a voltage and generate a boosted voltage, and a well voltage transmission unit connected to the first negative voltage generation unit, the boost unit, and the first P-well, and configured to switch a voltage between the first negative voltage and the boosted voltage, the voltage being applied to the first P-well.Type: GrantFiled: September 4, 2012Date of Patent: November 11, 2014Assignee: Kabushiki Kaisha TosibaInventor: Hiroyuki Kutsukake
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Patent number: 8857187Abstract: A steam turbine plant of one embodiment includes a solar energy collector configured to collect solar heat, a boiler configured to change water into steam by the solar heat, a high pressure turbine including a turbine or turbines connected to each other in series, and configured to be driven by the steam from the boiler, first to N-th reheaters, where N is an integer of two or more, and first to N-th reheat turbines, wherein the first reheater is configured to heat the steam exhausted from the high pressure turbine by the solar heat, and the first reheat turbine is configured to be driven by the steam from the first reheater, and the second to N-th reheaters are configured to heat the steam exhausted from the first to (N?1)-th reheat turbines by the solar heat, respectively, and the second to N-th reheat turbines are configured to be driven by the steam from the second to the N-th reheaters, respectively.Type: GrantFiled: April 6, 2011Date of Patent: October 14, 2014Assignee: Kabushiki Kaisha TosibaInventors: Koichi Goto, Nobuo Okita
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Patent number: 8710542Abstract: A semiconductor device includes a base layer, a second conductivity type semiconductor layer, a first insulating film, and a first electrode. The first insulating film is provided on an inner wall of a plurality of first trenches extending from a surface of the second conductivity type semiconductor layer toward the base layer side, but not reaching the base layer. The first electrode is provided in the first trench via the first insulating film, and provided in contact with a surface of the second conductivity type semiconductor layer. The second conductivity type semiconductor layer includes first and second regions. The first region is provided between the first trenches. The second region is provided between the first second conductivity type region and the base layer, and between a bottom part of the first trench and the base layer. The second region has less second conductivity type impurities than the first region.Type: GrantFiled: September 21, 2011Date of Patent: April 29, 2014Assignee: Kabushiki Kaisha TosibaInventor: Mitsuhiko Kitagawa
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Patent number: 8469172Abstract: This invention is to prevent a MAC of a correct answer from being calculated by use of an IC card even if count data in the database of a PC is falsified since the MAC calculated by the IC card is made invisible from the exterior of the IC card. Thus, falsification of data by enciphering the number (total sum) of cut sheets in a sheet checking equipment.Type: GrantFiled: February 24, 2011Date of Patent: June 25, 2013Assignee: Kabushiki Kaisha TosibaInventor: Masahiro Shishikura
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Publication number: 20080237863Abstract: A semiconductor device, which is comprised of a copper wiring layer which is formed above a semiconductor substrate, a pad electrode layer which conducts electrically to the copper wiring layer and has an alloy, which contains copper and a metal whose oxidation tendency is higher than copper, formed to extend to the bottom surface, and an insulating protective film which has an opening extended to the pad electrode layer, is provided.Type: ApplicationFiled: April 22, 2008Publication date: October 2, 2008Applicant: Kabushiki Kaisha TosibaInventors: Hiroshi Toyoda, Mitsuhiro Nakao, Masahiko Hasunuma, Hisashi Kaneko, Atsuko Sakata, Toshiaki Komukai
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Patent number: 7327875Abstract: There is disclosed an image processing apparatus of the present invention in which a color region of a range including a color range that can be outputted by an image output device is mapped based on a predetermined mapping function defined between the color region and a color conversion table address space by an address map producing section, so that waste in a color conversion table is inhibited, the number of valid lattice points in the color conversion table increases, and therefore color conversion accuracy is improved.Type: GrantFiled: November 26, 2003Date of Patent: February 5, 2008Assignees: Kabushiki Kaisha Tosiba, Toshiba Tec Kabushiki KaishaInventor: Takayuki Sawada