Patents Assigned to Kawaski Microelectronics, Inc.
  • Silicon on insulator device and layout method of the same
    Patent number: 7160786
    Abstract: A silicon on insulator (SOI) semiconductor device includes a wire connected to doped regions formed in an active layer of a SOI substrate. A ratio of the area of the wire to the doped region or a ratio of the area of contact holes formed on the wire to the doped region is limited to a predetermined value. When the ratio exceeds the predetermined value, a dummy doped region is added to prevent the device from being damaged during a plasma process.
    Type: Grant
    Filed: October 4, 2004
    Date of Patent: January 9, 2007
    Assignee: Kawaski Microelectronics, Inc.
    Inventor: Yoshitaka Kimura