Abstract: The current document is directed to component-efficient CRC-code-computation logic used in electronic-communications hardware. Many current implementations employ a number n of XOR matrices equal to the number of bytes in the fundamental data unit, or word, operated on by the CRC-code-computation logic. As the size, in bytes, of the fundamental-data-unit increases, due to increases in the widths of internal data-transmission components, the number n of XOR matrices in CRC-code-computation logic has correspondingly increased. The currently disclosed CRC-code-computation logic employs message-padding logic in order to compute CRC codes using only a single XOR matrix.

Abstract: One implementation of an NVMe storage system uses NVMe over Fabric (NVMf) SSDs. This implementation is built using off-the-shelf RDMA Network Interface Cards (RNIC) to connect the server to the network and then to the NVMf SSDs. The current document discloses a split implementation with the PCI Express/NVMe interface on an NVMe Initiator board plugged into a server and the Flash implemented on one or many network attached Flash (NVMf) devices.