Patents Assigned to Kazuo Hattori
  • Patent number: 5497024
    Abstract: A combination of a semiconductor region essentially consisting of Al.sub.x Ga.sub.1-x As (0.ltoreq.x.ltoreq.1), an insulating film formed on the surface of the semiconductor region and essentially consisting of GaAs.sub.x P.sub.y O.sub.z (w, y, z>0), and a passivation film formed on the insulating film and made of an insulating material different from the insulating film. The laminated insulating film has an extremely low leakage current. An excellent MISFET can be realized by forming a gate electrode on the surface of the laminated insulating film.
    Type: Grant
    Filed: April 5, 1994
    Date of Patent: March 5, 1996
    Assignees: Asahi Kogyosha Co., Ltd., Kazuo Hattori, Fujitsu Limited
    Inventors: Akira Shibuya, Kazuo Hattori, Masashi Ozeki