Abstract: A transient voltage suppressor and its manufacturing method are provided, which can easily control voltage withstanding characteristics of a Zener diode by analogizing growth of a buried layer by forming a portion of the buried layer by performing ion implantation on a first epitaxial layer and then forming the other portion of the buried layer while depositing a second epitaxial layer having the same impurity concentration with the first epitaxial layer, and which can improve a current distribution characteristic by forming a doping region in a ring shape to increase a current pass region by increasing a PN junction area of a Zener diode in a small area.

Abstract: Provided are a semiconductor device and a bonding structure thereof, in which an inter-metal compound is not formed with a semiconductor die or a lead frame, thereby improving electrical and mechanical properties and wettability and suppressing conglomeration of a die bonding material. The semiconductor device includes a semiconductor die, a barrier layer formed on a surface of the semiconductor die, a first metal layer formed on the barrier layer, a central metal layer formed on the first metal layer, and a second metal layer formed on the central metal layer. Here, the first and second metal layers have a first melting temperature, and the central metal layer has a second melting temperature lower than the first melting temperature.

Abstract: A power semiconductor device is provided, which can prevent an electric field from concentrating on a diode region, and can improve a breakdown voltage by creating an impurity concentration gradient in the diode region to increase from a termination region to an active cell region to cause reverse current to be distributed to the active cell region.

Abstract: A power semiconductor device is provided, which can prevent an electric field from concentrating on a diode region, and can improve a breakdown voltage by creating an impurity concentration gradient in the diode region to increase from a termination region to an active cell region to cause reverse current to be distributed to the active cell region.

Abstract: A power semiconductor device capable of transmitting gate signals in all directions (e.g., up-/down-ward/right-/left-ward) on a plane and a method of manufacturing the same. The power semiconductor device includes first conductive regions, formed to a predetermined depth in a surface of a conductive low concentration epitaxial layer. The first conductive regions include linear first conductive layers spaced from each other and linear second conductive layers spaced from each other. Second conductive regions are formed to a smaller width and depth than the first and second conductive layers to form channels in the first and second conductive layers. A gate oxide layer formed on a surface of the epitaxial layer defines first windows having a smaller width than the first conductive layers and second windows having a smaller width than the second conductive layers. A gate polysilicon layer is formed on the gate oxide layer.

Abstract: Disclosed is a single wire communication system for communicating between integrated circuits. The single wire communication system comprises an upper control device generating control commands, a to-be-controlled chip operating with the control commands, and a single wire communication module transferring the control commands. The single wire communication module processes the control commands from the upper control device with the control commands separated into a start signal, a data signal, an end signal, and an ack signal, converts them to at least one or more bits of data bits, and the transfers them to the to-be-controlled chip. By doing so, the present invention can transfer the control commands from the upper control device to the to-be-controlled chip without any loss or distortion caused from unstable factors such as noises, and enables high speed process of a number of commands.

Abstract: A power semiconductor device capable of transmitting gate signals in all directions (e.g., up-/down-ward/right-/left-ward) on a plane and a method of manufacturing the same. The power semiconductor device includes first conductive regions, formed to a predetermined depth in a surface of a conductive low concentration epitaxial layer. The first conductive regions include linear first conductive layers spaced from each other and linear second conductive layers spaced from each other. Second conductive regions are formed to a smaller width and depth than the first and second conductive layers to form channels in the first and second conductive layers. A gate oxide layer formed on a surface of the epitaxial layer defines first windows having a smaller width than the first conductive layers and second windows having a smaller width than the second conductive layers. A gate polysilicon layer is formed on the gate oxide layer.

Abstract: A DC-AC converter has two half-bridge circuits using an input feedback signal and an input clock signal together with time delay circuits, wherein one of the half-bridge circuits drives one pair of corresponding FETs and the other half-bridge circuit drives the other pair of corresponding FETs. The DC-AC converter includes: a Direct Current (DC) power source; a switching unit which includes a plurality of Field Effect Transistors (FETs) for changing paths of Direct Current (DC), so as to convert the DC to Alternating Current (AC); a transformer for transforming a voltage input from the switching unit; a load unit connected to the transformer; and a signal control unit for simultaneous parallel control of the FETs in the switching unit.

Abstract: Disclosed is a gate pulse modulator. The inventive gate pulse modulator includes an input control unit receiving inputs from a gate high signal terminal, a clock signal terminal and a control signal terminal. In addition, the inventive gate pulse modulator includes an output control unit connected to the gate high signal terminal, the control signal terminal and an external driving signal terminal, wherein the output control unit supplies a base voltage to a gate driving unit when the control signal is low, and in the state where the control signal is high, the output control unit supplies a gate high voltage to the gate driving unit if the clock signal is high and supplies a driving voltage to the gate driving unit if the clock signal is low. In addition, the invention further comprises a time delay unit connected to a stage prior to the input control unit, so that the gate high voltage delayed for a predetermined length of time is supplied to the gate driving unit.

Abstract: Disclosed is a rectifier diode device. The rectifier diode device includes a conductive base, a semiconductor chip, a conductive lead and insulation resin. A trench and a post are formed in the conductive base in order to increase a bonding surface between the conductive base and the insulating resin and to lengthen a humidity transfer path for the semiconductor chip. Due to the trench and the post, the bonding surface between the conductive base and the insulating resin increases and the humidity transfer path for the semiconductor chip lengthens, thereby improving heat emission performance of the rectifier diode device. A plurality of prismatic protrusions is formed at an outer peripheral wall of the conductive wire so that coupling force between the conductive wire and an external device is improved. A protrusion ring is provided at a lower surface of the conductive wire so that stress applied to the semiconductor chip is minimized when the rectifier diode device is press-fitted into the external device.