Abstract: Virtual horizontally-scalable packet broker systems and methods are disclosed for distribution of session-based network traffic. One or more distributors along with a plurality of ingress processors and egress processors are operated within a virtual processing environment to forward session-based network traffic to network tools. The session-based network traffic includes user packets and control packets associated with user sessions. In addition, one or more session controllers are also operated within the virtual processing environment to dynamically control numbers of virtual processing nodes operating as the distributors, the ingress processors, and the egress processors. User packets are processed and distributed by the distributors, ingress processors, and the egress processors. Control packets are processed and distributed by the distributors, session controllers, and egress processors. The egress processors can include initial and secondary egress processors.

Abstract: An envelope behavioral model is developed and used in a system and method that simulates and predicts outputs of a non-linear component. An analyzer generates a test signal which is provided as input to the non-linear component. Model kernels representative of static and dynamic parts of the model are extracted from an output of the non-linear component responsive to the test signal. The dynamic part represents memory effects of the non-linear component. The model kernels are then used by a simulator to predict the output of the non-linear component responsive to signals of a modulation type.

Abstract: A measurement system is provided that performs a trigger data acquisition algorithm. When the measurement system performs the trigger event data acquisition algorithm, it causes a preselected number of digital data samples acquired during a first time window that includes a trigger event and during a second time window that is specified by the user and that is subsequent in time to the first time window to be stored in memory. Digital data samples acquired after the end of the first time window and before the beginning of the second time window are not stored in memory. By not storing digital data samples acquired after the end of the first time window and before the beginning of the second time window, the possibility of overwriting samples that surround the trigger event is prevented and the memory is used very efficiently.

Abstract: A method of processing an optical input signal comprises transmitting the optical input signal through first and second signal paths, mixing the optical input signal with first and second local oscillator (LO) signals in the respective first and second signal paths to produce first and second electrical signals corresponding to different portions of a frequency spectrum of the optical input signal, and combining the first and second electrical signals to produce a coherent time-domain output signal.

Abstract: A method for operating a data processing system to compute the response of a DUT to a modulated input signal is disclosed. The method includes determining a set of parameters for a first model of the DUT from a plurality of measurements of output values from the DUT, each output value includes a measurement of a gain and phase shift provided by the DUT when the DUT is stimulated with a single tone input signal having a frequency in a frequency range determined by the modulated signal. The method also determines a second model that characterizes noise generated by the DUT at the single tone input signals. A performance parameter for an output signal that would be obtained by applying the modulated input signal to an input of the DUT, and receiving the output of the DUT is then determined from the first and second models.

Abstract: A method is provided for performing real-time spectral analysis of a non-stationary signal. The method includes sampling the non-stationary signal, using an observation window having a length short enough to approximate a stationary signal, to provide an initial set of sampled data, buffering the initial set of sampled data to obtain multiple buffered sets of sampled data, filtering the initial set of sampled data and the buffered sets of sampled data, using corresponding filter responses, to obtain multiple filtered sets of sampled data, and performing a chirp-z-transform (CZT) of the filtered sets of sampled data to provide a set of discrete Fourier transforms (DFT) coefficients. A total signal spectrum of the non-stationary signal is reconstructed using the set of DFT coefficients.

Abstract: Distributed amplifier systems and methods are disclosed. An example distributed amplifier system includes first stage traveling wave amplifier (TWA) circuitry that is controllable to provide one of a first set of discrete gain settings. The first stage TWA circuitry includes a first input transmission line, a first output transmission line, and a first plurality of amplifiers coupled antiparallel between the first input transmission line and the first output transmission line. The first set of discrete gain settings has approximately constant logarithmic spacing.

Abstract: Provided are a method and an apparatus that are capable of easily obtaining a data sheet including characteristics under desired operating conditions based on an actual measurement. A method of evaluating an electronic and an apparatus configured to execute the method are provided. The method includes displaying a characteristic parameter item or a characteristic graph item in a data sheet format; editing the characteristic parameter item or the characteristic graph item; and providing a button for initiating execution of a measurement of the characteristic parameter item or the characteristic graph item.

Abstract: Generally, in accordance with the various illustrative embodiments of the invention, a signal analyzer can incorporate a quasi-peak detection circuit that includes a detector diode. The detector diode is reverse-biased by using a direct-current (DC) voltage source. In some exemplary implementations, the DC bias voltage is defined on the basis of a predicted DC voltage at an output node of the quasi-peak detection circuit in response to a noise level contribution of the signal analyzer when the detector diode is unbiased. A signal is propagated through the quasi-peak detection circuit after the detector diode is reverse-biased, followed by a noise floor adjustment procedure. The noise floor adjustment procedure includes an adjustment directed at least in part, at compensating for the DC bias voltage that is used to reverse-bias the detector diode.

Abstract: Generally, in accordance with the various illustrative embodiments disclosed herein, a current sensing probe includes a current-to-voltage conversion circuit that not only presents a desirable impedance into an inductive current sensing element of the current sensing probe, but also remains operationally stable over a wide range of frequencies when measuring a current flowing through a device-under-test. The wide frequency range can extend down to some low frequencies that can prove challenging to conventional current sensing probe circuits.

Abstract: A computer system having reduced write latency and methods for use in computer systems for reducing write latency are provided. Processing circuitry of the computer system is configured to execute a volume filter driver (VFD) that can be switched between a fast termination (FT) mode of operations and a normal, or quiescent, mode of operations. When the processing circuitry receives input/output (IO) write requests to write data to memory while the VFD is in the FT mode of operations, the VFD causes metadata associated with received IO write requests to be written to a volume of memory while preventing actual data associated with received IO write requests from being written to the volume, thereby resulting in extremely fast FT mode operation. After the file has been written to the volume, the VFD enters the quiescent mode of operations during which the VFD passes all IO write requests to the volume.

Abstract: In accordance with one illustrative embodiment, a system for determining a self-discharge current characteristic of a storage cell (or a bank of storage cells) includes a voltage source, first and second voltage measurement circuits, a current measurement circuit, and a processor. The voltage source provides a potentiostat voltage to the storage cell coupled to the system. The first voltage measurement circuit provides a first voltage resolution for measuring an open circuit voltage across a pair of terminals of the storage cell. The second voltage measurement circuit provides a second voltage resolution that is significantly higher than the first voltage resolution for measuring a terminal voltage at one of the pair of terminals of the storage cell. The processor executes a test procedure by using the voltage source, the first and second voltage measurement circuits, and the current measurement circuit, to determine the self-discharge leakage current characteristic of the storage cell.

Abstract: A method for operating a data processing system to decode a data packet and computer readable medium that causes a data processor to perform that method when the media read by the data processing system is disclosed. The method provides a model of the possible data packet formats and an iterative process for moving through the model to decode a data packet. The model includes a plurality of nodes connected by arcs. The program iteratively examines the data packet by proceeding to a next node from a current node. The current node examines a portion of the data packet by matching each of a plurality of candidate matches to that portion of the data packet. The candidate matches include a pattern to be matched against the portion, a priority that determines the order in which the candidates matches are matched, and the identity of the next node.

Abstract: A method is provided for simulating intermods of a signal including multiple carriers. The method includes receiving parameters of the signal, the parameters including a total number of carriers, a frequency of one carrier and a spacing between adjacent carriers; identifying multiple intermod combinations corresponding to a desired intermod order; and synthesizing multiple intermod envelopes corresponding to the intermod combinations according to multiple predetermined algorithms using at least one of the total number of carriers, the frequency of the one carrier, and the spacing between adjacent carriers. The predetermined algorithms including at least one predetermined algorithm corresponding to each intermod combination of the multiple intermod combinations.

Abstract: An apparatus that searches for a pattern in a signal is disclosed. The apparatus can be used to implement a real time trigger in an instrument such as a high speed oscilloscope. The apparatus includes a symbol generator and a finite state machine (FSM). The symbol generator receives an ordered sequence of signal values and converts the ordered sequence of signal values into an ordered sequence of symbols, each symbol having a plurality of states. The FSM receives the ordered sequence of symbols and generates a match signal if the ordered sequence of symbols includes a target sequence specified by a regular expression that includes a counting limitation on one of the symbol states. The FSM includes a counting state that includes a counter that counts instances of the one of the symbol states.

Abstract: An apparatus that moves stimulus data and response data between a memory and a device under test (DUT) over a plurality of data transfer banks. In a first mode the data transfer banks output the stimulus data to the DUT as respective independent banks of serial stimulus data channels, and write the response data into the memory responsive to data provided as respective independent banks of channels of serial data from the DUT. In a second mode the data transfer banks output the stimulus data to the DUT as a single bank of combined serial stimulus data channels, and write the response data into the memory responsive to the data provided as a combined single bank of channels of serial data from the DUT.

Abstract: A method for operating a data processing system to analyze data sets for groupings and a computer readable medium having instructions to execute that method are disclosed. The method includes causing the data processing system to receive a plurality of data sets, each data set including a plurality of values characterized by a statistical distribution and a label. The method also includes causing the data processing system to compute a plurality of statistical parameters for each of the plurality of data sets, to generate a data set vector having components equal to the plurality of statistical parameters for each of the plurality of data sets, to assign each data set to a cluster based on the data set vectors using a clustering algorithm, and to generate a display of the statistical distributions as a function of the labels in which the statistical distributions belonging to the same cluster are grouped together.

Abstract: An oscilloscope includes a probe and an analog to digital converter. The probe detects a varying electronic signal and produces an analog signal. The analog to digital converter converts the analog signal to a digital signal. The oscilloscope detects vertical movement of the digital signal as a first digital trigger triggered at a trigger time. A segment of the digital signal is compared with predetermined parameters for the varying electronic signal received from a user to confirm whether a pattern of the varying electronic signal in the segment matches the predetermined parameters. When the pattern of the varying electronic signal in the segment matches the predetermined parameters, the process includes generating a display showing the varying electronic signal in the segment based on the trigger time.

Abstract: Techniques and test structures for determining reliability and performance characteristics of an integrated circuit (IC) device are disclosed. For example, an IC device includes multiple functional elements and multiple test elements. The test elements are electrically coupled in series between a first test port and a second test port. A method of testing the IC device includes applying an electrical stimulus between the first test port and the second test port, measuring a parametric value in response to the electrical stimulus, comparing the parametric value and a statistical value, and determining a pass or fail status of the IC device. The statistical value is representative of a predicted reliability of the IC device.

Abstract: A measurement instrument receives an analog input signal from a measurement target, converts the input signal into a digital signal, scans the digital signal and comparing the scanned digital signal with a pattern signature using a flexible matching procedure implemented by hardware, and triggers the measurement instrument according to a result of the flexible matching procedure.