Patents Assigned to Kioxia Cororation
  • Patent number: 11874738
    Abstract: A memory system connectable to a host, includes a non-volatile memory including a plurality of memory cell transistors and a controller configured to execute read operations on the non-volatile memory. The controller executes one or more first read operations on the non-volatile memory to obtain read data using read voltages that are determined from one of a plurality of entries stored in a shift table, and performs error correction on the read data, until the error correction is successful, and when the error correction on the read data is successful, records an index corresponding to the entry stored in the shift table that was used in obtaining the successfully error-corrected read data. The controller executes a second read operation on the non-volatile memory to obtain read data using read voltages that are determined from the entry stored in the shift table corresponding to the recorded index.
    Type: Grant
    Filed: December 21, 2022
    Date of Patent: January 16, 2024
    Assignee: Kioxia Cororation
    Inventors: Noboru Okamoto, Toshikatsu Hida