Abstract: Light emitting diodes (LEDs) and LED bars and LED arrays formed of semiconductive material, such as III-V, and particularly AlGaAs/GaAs material, are formed in very thin structures using organometallic vapor deposition (OMCVD). Semiconductor p-n junctions are formed as deposited using carbon as the p-type impurity dopant. Various lift-off methods are described which permit back side processing when the growth substrate is removed and also enable device registration for LED bars and arrays to be maintained.
Type:
Grant
Filed:
January 18, 1991
Date of Patent:
April 5, 1994
Assignee:
Kopin Corporation
Inventors:
John C. C. Fan, Brenda Dingle, Shambhu Shastry, Mark B. Spitzer, Robert W. McClelland
Abstract: The invention relates to device processing, packaging and interconnects that will yield integrated electronic circuitry of high density and complexity. Processes include the formation of complex multi-function circuitry on common module substrates using circuit tiles of silicon thin-films which are transferred, interconnected and packaged. Circuit modules using integrated transfer/interconnect processes compatible with extremely high density and complexity provide large-area active-matrix displays with on-board drivers and logic in modules.
Type:
Grant
Filed:
February 13, 1992
Date of Patent:
November 2, 1993
Assignee:
Kopin Corporation
Inventors:
Mark B. Spitzer, Jack P. Salerno, Jeffrey Jacobsen, Brenda Dingle, Duy-Phach Vu, Paul M. Zavracky
Abstract: A display panel is formed using essentially single crystal thin-film material that is transferred to substrates for display fabrication. Pixel arrays form light valves or switches that can be fabricated with control electronics in the thin-film material prior to transfer. The resulting circuit panel is than incorporated into a display panel with a light emitting or liquid crystal material to provide the desired display.
Type:
Grant
Filed:
December 3, 1991
Date of Patent:
November 2, 1993
Assignee:
Kopin Corporation
Inventors:
Paul M. Zavracky, John C. C. Fan, Robert McClelland, Jeffrey Jacobsen, Brenda Dingle
Abstract: The invention relates to the formation of arrays of thin film transistors (TFT's) on silicon substrates and the dicing and tiling of such substrates for transfer to a common module body.
Type:
Grant
Filed:
November 4, 1992
Date of Patent:
October 26, 1993
Assignee:
Kopin Corporation
Inventors:
Duy-Phach Vu, Brenda D. Dingle, Jason E. Dingle, Ngwe Cheong
Abstract: A method of forming gallium arsenide on silicon heterostructure including the use of strained layer superlattices in combination with rapid thermal annealing to achieve a reduced threading dislocation density in the epilayers. Strain energy within the superlattices causes threading dislocations to bend, preventing propagation through the superlattices to the epilayer. Rapid thermal annealing causes extensive realignment and annihilation of dislocations of opposite Burgers vectors and a further reduction of threading dislocations in the epilayer.
Abstract: A display panel is formed using essentially single crystal thin-film material that is transferred to substrates for display fabrication. Pixel arrays form light valves or switches that can be fabricated with control electronics in the thin-film material prior to transfer. The resulting circuit panel is than incorporated into a display panel with a light emitting or liquid crystal material to provide the desired display.
Type:
Grant
Filed:
December 31, 1990
Date of Patent:
April 27, 1993
Assignee:
Kopin Corporation
Inventors:
Paul M. Zavracky, John C. C. Fan, Robert McClelland, Jeffrey Jacobsen, Brenda Dingle
Abstract: The present invention relates to the fabrication of diaphragm pressure sensors utilizing silicon-on-insulator technology where recrystallized silicon forms a diaphragm which incorporates electronic devices used in monitoring pressure. The diaphragm is alternatively comprised of a silicon nitride having the necessary mechanical properties with a recrystallized silicon layer positioned thereon to provide sensor electronics.
Type:
Grant
Filed:
March 6, 1992
Date of Patent:
January 5, 1993
Assignee:
Kopin Corporation
Inventors:
Paul M. Zavracky, Richard H. Morrison, Jr.
Abstract: A high temperature Schottky barrier diode utilizing a refractory metal with a p-type gallium arsenide wafer can be used as a by-pass diode for solar cell arrays. The diode structure can be integrally formed with a solar cell having a high temperative metallized contact grid.
Abstract: A method and apparatus for reducing branching, reducing defects, and improving the overall surface morphology of silicon on insulator (SOI) structures produced by Zone Melting and Recrystallization (ZMR) is described. A special heater for use in preparing SOI structures formed by ZMR comprises a graphite mass having corrugations extending along one or more side walls and which may be periodic. The heater provides concentrated regions of heat which vary periodically across the length of the molten zone of the SOI structure. Alternatively, the heater comprises a stationary lower heater member upon which the wafer is placed and a movable upper heater member having corrugations. ZMR is achieved by translating the corrugated upper heater member past the wafer. In yet another alternative, a well known strip heater having a uniformly shaped movable upper member is improved by replacing the upper member with a movable upper heater member having corrugations.
Type:
Grant
Filed:
November 2, 1990
Date of Patent:
June 9, 1992
Assignee:
Kopin Corporation
Inventors:
Paul M. Zavracky, Thomas P. Ford, Lisa P. Allen
Abstract: A photovoltaic device utilizing compound semiconductor materials that are stable when operated at high temperatures. Hostile environments, and in particular, thermally stressful environments such as those generated by use of light concentrating systems, require encapsulation of the device. Sealing of the photo-active junction, the conductive grid, the exposed semiconductor surfaces, and the pads contacting the grid away from the junction area provide such thermal stability. A heterojunction structure can be used along with barrier materials providing a conductive grid in contact with the photo-active surface thereby reducing interdiffusion of that surface with the conductive grid.
Abstract: The present invention relates to the fabrication of diaphragm pressure sensors utilizing silicon-on-insulator technology where recrystallized silicon forms a diaphragm which incorporates electronic devices used in monitoring pressure. The diaphragm is alternatively comprised of a silicon nitride having the necessary mechanical properties with a recrystallized silicon layer positioned thereon to provide sensor electronics.
Type:
Grant
Filed:
May 21, 1990
Date of Patent:
March 10, 1992
Assignee:
Kopin Corporation
Inventors:
Paul M. Zavracky, Richard H. Morrison, Jr.
Abstract: The improved zone-melt recrystallization apparatus is comprised of a heating element having a plurality of individually controllable heating elements. The elements are heated in sequence to generate a melted zone within a semiconductor material which is translated across the material by heating then cooling adjacent heating elements to recrystallize the material.
Type:
Grant
Filed:
June 28, 1989
Date of Patent:
December 24, 1991
Assignee:
Kopin Corporation
Inventors:
Paul M. Zavracky, Jack P. Salerno, Matthew M. Zavracky
Abstract: A metallization system for contacting semiconductor materials employed in high temperature applications that is thermally stable. The system can be utilized in the fabrication of electronic devices such as diodes, lasers, transistors, solar cells, and integrated circuits comprised of such devices.
Abstract: The phase of the YBa.sub.2 Cu.sub.3 O.sub.9-.delta. having a perovskite unit cell structure of approximately the following dimensions a=3.8A, b=3.9A, and c=13.55A has been discovered and identified.
Abstract: The improved zone-melt recrystallization apparatus is comprised of a port system for providing a thermal barrier between the recrystallization chamber and the loader assembly. A bellows system is used to lift a plurality of pins that support a silicon wafer being recrystallized. Flexure supports are designed to constrain the motion of the pins within the desired direction of motion of the wafer.
Abstract: A method for reducing defects after zone melting and recrystallization of semiconductor films formed on an insulator over a semiconductor substrate by selectively removing portion of a first layer over the semiconductor film, amorphizing the exposed film portion and laterally regrowing the amorphized region.
Type:
Grant
Filed:
October 18, 1990
Date of Patent:
June 4, 1991
Assignee:
Kopin Corporation
Inventors:
John C.C. Fan, Paul M. Zavracky, Jagdish Narayan, Lisa P. Allen, Duy-Phach Vu
Abstract: Reduction of parasitic coupling capacitances which are otherwise formed between conventional NMOS transistor N type drain regions and the transistor's substrate and well regions is described by using a semiconductor-on-insulator (SOI) substrate and forming the NMOS transistor on a semiconductor (Si) substrate having a buried insulator forming a deep, lightly doped N type subsurface region beneath the conventional surface drain region (but not the source region) which contacts the buried insulator.
Abstract: An monolithic integrated transceiver formed on an Si substrate comprising: a III-V compound light source, a III-V compound light detector and a pyramidal groove formed in the substrate for aligning an optical fiber with said transmitter.
Type:
Grant
Filed:
November 3, 1989
Date of Patent:
February 5, 1991
Assignee:
Kopin Corporation
Inventors:
Paul M. Zavracky, Matthew M. Zavracky, John C. C. Fan, Jack P. Salerno
Abstract: An improved method of forming seed openings for zone-melting and recrystallization of polysilicon film on an insulator over silicon (SOI) is described. This method comprises forming a narrow discontinuous pattern of seed openings formed by an overlapping sub-pattern of discontinuous shaped openings. Alternatively, in an edge bead seed embodiment, a resist is removed from an SOI precursor structure, comprising an insulator on an Si wafer, thus exposing the peripheral edge of the insulator. The exposed insulator is then also removed to provide a peripheral edge seed opening to the underlying Si wafer.
Type:
Grant
Filed:
March 30, 1989
Date of Patent:
July 31, 1990
Assignee:
Kopin Corporation
Inventors:
Lisa P. Allen, Duy-Phach Vu, Michael W. Batty, Richard H. Morrision, Jr., Paul M. Zavracky
Abstract: A monolithic integrated structure in which a compound semiconductor (III-V or II-VI material) optoelectronic device (laser) is formed in the shape of a mesa-like structure projecting from an etch pit in an Si substrate. A method for sonically removing cantilevered beams formed on said optoelectronic device, to provide laser end facets, is also described.