Abstract: A novel metallocene compound and a method for producing a polymer by using the metallocene as a polymerization catalyst. The present catalyst includes a neutral metallocene compound, a cationic metallocene compound, and the compound supported catalyst. The present catalyst can be used to produce a polymer having a characteristic structure and physical properties.
Abstract: A tomographic apparatus for obtaining a cross-sectional image by fixing an X-ray source, and synchronously rotating an object under examination and a detector. According to the apparatus, the slope angle of the X-ray source can be sufficiently enlarged by the adjustment of the X-ray tube, and thus the precision of the obtained cross-sectional image can be heightened. Also, a method of obtaining a cross-sectional image of a three-dimensional object from an arbitrary direction and height.
Abstract: According to the method, an aqueous salt solution containing either tin, indium or both, are mixed with an alkali to produce a slurry containing precipitated particles. Then, the slurry is maintained at a predetermined temperature range for a time sufficient to convert the precipitated particles to larger size particles by coagulation or agglomeration. The resulting slurry is then dried and calcined to produce a mixed power. The mixed power is ball milled, press molded and/or cold isostatic press (CIP) molded. The molded body is then sintered to form an ITO sintered body. The ITO sintered body obtained by this process offers superior sinterability whose theoretical density can reach more than 95%.
Type:
Grant
Filed:
July 31, 1997
Date of Patent:
February 2, 1999
Assignee:
Korea Academy of Industrial Technology
Inventors:
In Gyu Lee, Chong Kwang Yoon, Seung Moo Heo, Se Hong Chang, Jung Ju Kim
Abstract: A pipelined multi-stage analog-to-digital converter (ADC) exhibits high speed and high resolution characteristics in a small chip area using a CMOS process. An optimized high resolution multi-stage ADC improves integral non-linearity errors (INL) and differential non-linearity (DNL) errors and hence increases yield. A binary-weighted capacitor array is used in a multiplying digital-to-analog converter (MDAC) in a front-end stage, and a unit capacitor array is used in the MDACs of the latter stages thereof. Offset, feedthrough and gain errors are removed via digital correction. A digital calibration technique is adopted to reduce the non-ideal effects resulting from component mismatch, by measuring all the code errors of the front-end stage, to thereby minimize the midpoint code DNL error without reference to code symmetry.