Patents Assigned to Kubushiki Kaisha Toshiba
  • Publication number: 20120206190
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor circuit and an electric-power supply. The semiconductor circuit includes a main element including a switching element and an antiparallel diode, a reverse voltage application circuit including a high-speed free wheeling diode, a capacitor and an auxiliary element, a main element drive circuit, and an auxiliary element drive circuit. The electric-power supply is configured to supply electric-power to the capacitor, the main element drive circuit and the auxiliary element drive circuit, and has a voltage lower than the withstand voltage of the main element.
    Type: Application
    Filed: February 14, 2012
    Publication date: August 16, 2012
    Applicant: KUBUSHIKI KAISHA TOSHIBA
    Inventors: Kazuyasu TAKIMOTO, Hiroshi Mochikawa, Yosuke Nakazawa, Atsuhiko Kuzumaki
  • Publication number: 20090099841
    Abstract: A system for calculating the look ahead probabilities at the nodes in a language model look ahead tree, wherein the words of the vocabulary of the language are located at the leaves of the tree, said apparatus comprising: means to assign a language model probability to each of the words of the vocabulary using a first low order language model; means to calculate the language look ahead probabilities for all nodes in said tree using said first language model; means to determine if the language model probability of one or more words of said vocabulary can be calculated using a higher order language model and updating said words with the higher order language model; and means to update the look ahead probability at only the nodes which are affected by the words where the language model has been updated.
    Type: Application
    Filed: October 3, 2008
    Publication date: April 16, 2009
    Applicant: Kubushiki Kaisha Toshiba
    Inventor: Langzhou CHEN
  • Publication number: 20090087159
    Abstract: According to one embodiment, an information reproducing device comprises a file creation module creating an application file, a decision module deciding whether a reading of the application is completed at a specified playback end time of the video object, a comparator module comparing in size between non-played back portion of the video object and the stored application file, a playback continuing module playing back the non-played back portion when it is smaller in size, and a readout module reading the stored application file when it is smaller in size.
    Type: Application
    Filed: August 29, 2008
    Publication date: April 2, 2009
    Applicant: KUBUSHIKI KAISHA TOSHIBA
    Inventors: Atsushi Onoda, Hitoshi Yoshida
  • Patent number: 6021789
    Abstract: Improved megasonic cleaning is obtained by use of an apparatus containing a plurality of transducers arranged to transmit a progressive megasonic wave through a liquid containing a planar surface of an object. The progression of the wave is preferably such that particles are carried by the wave toward the toward the edge of the wafer. The processes and apparatus are especially useful for cleaning wafers in the course of manufacturing integrated circuit chips.
    Type: Grant
    Filed: November 10, 1998
    Date of Patent: February 8, 2000
    Assignees: International Business Machines Corporation, Kubushiki Kaisha Toshiba
    Inventors: Hiroyuki Akatsu, Soichi Nadahara
  • Patent number: 5959908
    Abstract: An OR circuit generates a spare word line group selection signal based on output signals of address coincidence detection circuits and the OR circuit generates an upper/low-order selection signal. A spare word line selecting signal generation circuit generates a spare word line selection signal based on the upper/low-order selection signal and common word line selection signal and a word line driving circuit substitutes the spare word line or lines in a redundancy memory cell array in the unit of lines smaller than the number of word lines constructing one word line group in the memory cell array according to the spare word line group selection signal and spare word line selection signal.
    Type: Grant
    Filed: May 28, 1998
    Date of Patent: September 28, 1999
    Assignee: Kubushiki Kaisha Toshiba
    Inventor: Shinichiro Shiratake
  • Patent number: 5349292
    Abstract: A magnetic resonance imaging apparatus based on a multi-echo imaging scheme and a multi-slice imaging scheme, is arranged to acquire all components of an echo signal which corresponds to low-frequency components in an image which is small in the absolute value of the phase encoding amount in a sufficient time to ensure a desired signal-to-noise ratio and to acquire echo signals which correspond to high-frequency components in the image which are large in the absolute value of the phase encoding amount in acquisition times shorter than that time to ensure a desired signal-to-noise ratio. The signal acquisition time can be reduced by shortening the time interval at which the 180.degree. pulses are generated. Due to reducing the signal acquisition time, parts of the echo signal in the read direction are not acquired. The components which have not been acquired are estimated by use of complex conjugate data of acquired data or mere 0 values for image reconstruction.
    Type: Grant
    Filed: February 26, 1993
    Date of Patent: September 20, 1994
    Assignee: Kubushiki Kaisha Toshiba
    Inventor: Satoshi Sugiura
  • Patent number: 4929908
    Abstract: An amplifier circuit comprises an amplifying section for amplifying an input signal voltage, and feedback resistances for supplying part of an output voltage of the amplifying section as a negative feedback signal voltage thereto. The amplifying section of the amplifier circuit includes a first voltage-current converting amplifier for converting an input signal voltage into a corresponding current, a second voltage-current converting amplifier for converting a negative feedback signal voltage into a corresponding current, an active load circuit for coupling output currents of the first and second voltage-current converting amplifier, which are set in an opposite phase relation, and for generating an output voltage corresponding to the sum of the coupled currents, a voltage amplifier for amplifying the output voltage of the active load circuit, and a control circuit for controlling the ratio of the mutual conductances of the first and second voltage-current converting amplifiers.
    Type: Grant
    Filed: April 28, 1989
    Date of Patent: May 29, 1990
    Assignee: Kubushiki Kaisha Toshiba
    Inventor: Kazuo Imanishi