Patents Assigned to Kulicke and Soffa Investments, Inc.
  • Publication number: 20040155337
    Abstract: A package for mounting an integrated circuit die. In one embodiment the package comprises a metal substrate having first and second opposing primary surfaces and an aperture formed therebetween. A flexible thin film interconnect structure is formed over the first surface of the metal substrate and over the aperture. The flexible thin film interconnect structure has bottom and top opposing surfaces, a first region that is in direct contact with the first surface of the metal substrate and a second region that is opposite the aperture. The bottom surface of the thin film interconnect structure is in direct contact with the metal substrate in the first region.
    Type: Application
    Filed: February 6, 2003
    Publication date: August 12, 2004
    Applicant: Kulicke & Soffa Investments, Inc.
    Inventors: Jan I. Strandberg, Richard Scott Trevino, Thomas B. Blount
  • Patent number: 6760161
    Abstract: A method and system for providing different magnified images of an electronic device. The vision system has a first beamsplitter for receiving an image of the device illuminated by a light source, the beamsplitter providing multiple of images of the device; optical elements for receiving the plural images of the device, each of the optical elements magnifying the image by a predetermined magnification factor to produce more than one magnified images; and a second beamsplitter for receiving the magnified images and filtering out all but one of the magnified images based on a wavelength of the light source.
    Type: Grant
    Filed: January 3, 2003
    Date of Patent: July 6, 2004
    Assignee: Kulicke & Soffa Investments, Inc.
    Inventors: David T. Beatson, Christian Hoffman, Michael Woodward, Lawrence B. Brown
  • Patent number: 6729530
    Abstract: A system and method for aligning optical fibers that takes into account variations due to temperature changes and other nonrandom systemic effects. The system includes an alignment tool having a plurality of internal reflection surfaces and located below a vision plane of the first one of the pair of optical fibers, and an optical detector to receive an indirect image of a bottom surface of the first optical fiber through the alignment tool, such an offset between the first optical fiber and the optical detector is determined based on the indirect image received by the optical detector. The method comprises the steps of providing a cornercube offset tool having a plurality of total internal reflection surfaces below a vision plane of the first optical fiber, and receiving an indirect image of the first optical fiber through the cornercube offset tool.
    Type: Grant
    Filed: April 25, 2002
    Date of Patent: May 4, 2004
    Assignee: Kulicke & Soffa Investments, Inc.
    Inventors: David T. Beatson, Deepak Sood, Ashoke Banerjee
  • Patent number: 6729527
    Abstract: A bonding tool for bonding a wire to a substrate. The bonding tool has a body portion, a working tip coupled to one end of the body portion, an orifice extending along a longitudinal axis of the body and the working tip, and a polymer coating disposed over at least a portion of a surface of the orifice.
    Type: Grant
    Filed: January 30, 2001
    Date of Patent: May 4, 2004
    Assignee: Kulicke & Soffa Investments, Inc.
    Inventors: Benjamin Sonnenreich, Sigalit Robinzon
  • Patent number: 6715658
    Abstract: A bonding tool for bonding a fine wire to bonding pads having a very fine pitch is disclosed. The bonding tool comprises a working tip at an end thereof. The working tip includes i) a tapered section having a predetermined angle with respect to the longitudinal axis of the first cylindrical section, ii) a working face with a first annular chamfer formed at an outside portion of an end of the working tip and, iii) a second annular chamfer formed at an inside portion of the end of the working tip. The first and second annular chamfer adjacent one another and a substantially cylindrical axial passage coupled to an upper portion of the second annular chamfer. The bonding tool is formed from a material containing at least 80% ZrO2 by weight.
    Type: Grant
    Filed: July 17, 2001
    Date of Patent: April 6, 2004
    Assignee: Kulicke & Soffa Investments, Inc.
    Inventors: Gil Perlberg, Ziv Atsmon, Benjamin Sonnenreich, Arie Bahalui
  • Patent number: 6712257
    Abstract: A vision system and method for use with a bonding tool that takes into account variations due to temperature changes and other nonrandom systemic effects. The vision system includes a cornercube offset tool having a plurality of total internal reflection surfaces, the cornercube offset tool located below the vision plane of the optical system; and an optical detector to receive an indirect image of the bonding tool through the cornercube offset tool. The method comprises the steps of providing a cornercube offset tool having a plurality of total internal reflection surfaces below a vision plane of the bonding tool; and receiving an indirect image of the bonding tool through the cornercube offset tool.
    Type: Grant
    Filed: February 13, 2002
    Date of Patent: March 30, 2004
    Assignee: Kulicke & Soffa Investments, Inc.
    Inventors: David T. Beatson, Christian Hoffman, James E. Eder, John Ditri
  • Patent number: 6705507
    Abstract: A system and method having applications in semiconductor areas for accurate die placement on a substrate that takes into account any positional offset from the reference position due to variations caused by thermal change and other nonrandom systemic effects. The system includes an offset alignment tool having a plurality of internal reflection surfaces and located below a vision plane of the substrate, and an optical detector to receive an indirect image of a bottom surface of the die through the alignment tool, such that the die is accurately positioned on the substrate based on the indirect image received by the optical detector. The method comprises the steps of providing a cornercube offset alignment tool having a plurality of total internal reflection surfaces below a vision plane of the die, and receiving an indirect image of the die tool through the cornercube offset tool.
    Type: Grant
    Filed: February 14, 2002
    Date of Patent: March 16, 2004
    Assignee: Kulicke & Soffa Investments, Inc.
    Inventors: David T. Beatson, Christian Hoffman, James E. Eder, Jonn Ditri
  • Publication number: 20040012937
    Abstract: A process for manufacturing a Printed Circuit Board (PCB) substrate with passive electrical components (e.g., capacitors, inductors and/or resistors) includes weaving a plurality of dielectric strands (e.g., fiberglass yarns) and at least one electrically conductive strand (e.g., a copper wire) to form a woven fabric. The woven fabric is impregnated with a dielectric resin material to form an impregnated fabric and, thereafter, the impregnated fabric is cured to form a cured fabric. The cured fabric's upper and lower surfaces are then planed. The planing of the upper and lower surface segments the electrically conductive strands and forms a PCB substrate with a passive electrical component (e.g., a capacitor and/or inductor) therein. The passive electrical component(s) includes electrically isolated conductive strand segments separated by at least one of the dielectric resin material and the dielectric strands.
    Type: Application
    Filed: July 18, 2002
    Publication date: January 22, 2004
    Applicant: KULICKE & SOFFA INVESTMENTS, INC.
    Inventors: David DeGrappo, Richard Dow, Timothy W. Ellis
  • Patent number: 6641026
    Abstract: A vision system and method for use with a bonding tool that takes into account variations due to temperature changes and other nonrandom systemic effects. The vision system includes a cornercube offset tool having a plurality of total internal reflection surfaces, the cornercube offset tool located below the vision plane of the optical system; and an optical detector to receive an indirect image of the bonding tool through the cornercube offset tool. The method comprises the steps of providing a cornercube offset tool having a plurality of total internal reflection surfaces below a vision plane of the bonding tool; and receiving an indirect image of the bonding tool through the cornercube offset tool.
    Type: Grant
    Filed: February 13, 2002
    Date of Patent: November 4, 2003
    Assignee: Kulicke & Soffa Investments, Inc.
    Inventors: David T. Beatson, Christian Hoffman, James E. Eder, John Ditri
  • Publication number: 20030197289
    Abstract: The present invention provides a solution to the problem of weakening bond integrity in integrated circuit devices due in part to test probes galling and weakening the interconnect pads during functional and reliability test probing. In doing so, the invention enables a lowering of the chance a bond wire or interconnect pad will be lifted during a wire bonding process or in normal operation of an integrated circuit device.
    Type: Application
    Filed: April 19, 2002
    Publication date: October 23, 2003
    Applicant: Kulicke & Soffa Investments, Inc.
    Inventor: Paul T. Lin
  • Publication number: 20030197285
    Abstract: A package for mounting an integrated circuit die. In one embodiment the package comprises a metal substrate having first and second primary opposed surfaces and an aperture formed therebetween. A flexible thin film interconnect structure having bottom and top opposing surfaces is formed over the first primary surface of the metal substrate and over the aperture such that a first region of the bottom surface is in direct contact with the first surface of the metal substrate and a second region of the bottom surface is opposite the aperture. Within the second region of the bottom surface are a first plurality of exposed bonding pads having a first pitch appropriate for attaching the integrated circuit die to package. The top surface of the flexible thin film interconnect structure includes a second plurality of exposed bonding pads having a pitch greater than the first pitch.
    Type: Application
    Filed: April 23, 2002
    Publication date: October 23, 2003
    Applicant: Kulicke & Soffa Investments, Inc.
    Inventors: Jan I. Strandberg, Richard Scott Trevino, Thomas B. Blount
  • Patent number: 6634545
    Abstract: An apparatus and method for high speed, reliable and repeatable delivery and reflow of solder material onto a substrate are disclosed. The apparatus has a repositionable capillary to direct individual solder material to a specific location on the substrate. An energy source is directed through the capillary onto the solder to reflow the solder to the substrate. The apparatus provides for individual introduction of the solder material into the capillary and urging of the solder material from a reservoir to the capillary while preventing unintended jams and blockage of the solder material.
    Type: Grant
    Filed: November 7, 2001
    Date of Patent: October 21, 2003
    Assignee: Kulicke & Soffa Investments, Inc.
    Inventors: Eli Razon, Vaughn Svendsen, Robert Kowtko, Kyle Dury, Krishnan Suresh
  • Patent number: 6610930
    Abstract: Composite wires in which a noble metal annulus is welded to an electrically-conductive, non-noble metal wire core. Methods of forming the composite wire and semiconductor packaging having at least one lead bonded to the composite wire are also disclosed.
    Type: Grant
    Filed: September 16, 1998
    Date of Patent: August 26, 2003
    Assignee: Kulicke & Soffa Investments, Inc.
    Inventor: Jeffrey Michael Seuntjens
  • Patent number: 6608390
    Abstract: A wirebonded semiconductor package structure that provides for high frequency operation, a large number of I/O terminals, controlled low impedance, compensated inductance, electromagnetic shielding against cross-talk and prevention of false signals from ground bounce includes a semiconductor device, a semiconductor package substrate and a wirebond(s) electrically connecting the semiconductor device to the semiconductor package substrate. The wirebonded semiconductor package structure also includes a first insulating encapsulant layer at least partially encapsulating the wirebond(s) and a conductor layer (e.g., a patterned gold conductor layer) disposed on the first insulating encapsulant layer and electrically connected to the semiconductor package substrate. A method for manufacturing such a wirebonded semiconductor package includes wirebonding a semiconductor device (i.e.
    Type: Grant
    Filed: November 13, 2001
    Date of Patent: August 19, 2003
    Assignee: Kulicke & Soffa Investments, Inc.
    Inventors: David T. Beatson, Andrew F. Hmiel
  • Patent number: 6599561
    Abstract: An inexpensive and high throughput process for manufacturing a printed circuit board (PCB) substrate includes first weaving a plurality of electrically non-conductive strands (e.g., fiberglass yarns) and at least one electrically conductive strand (e.g., a copper wire) to form a woven fabric with an upper surface and a lower surface. Next, the woven fabric is impregnated with a resin material to form an impregnated fabric, which is then cured to form a cured fabric. The upper and lower surfaces of the cured fabric are subsequently planed. The planing step segments the electrically conductive strand(s) and forms a PCB substrate that includes a planarized cured fabric with upper and lower planed surfaces and a plurality of electrically conductive strand segments extending from the upper planed surface to the lower planed surface.
    Type: Grant
    Filed: November 30, 2001
    Date of Patent: July 29, 2003
    Assignee: Kulicke & Soffa Investments, Inc.
    Inventors: Richard Dow, Tim W. Ellis, David T. Beatson, Michael Hillebrand
  • Patent number: 6570396
    Abstract: Mass produced organic I.C. chip package designed to permanently package chips are used as MLO space transformers of a probe apparatus having buckling beam probes. The chip carriers have a solder mask layer with holes exposing trace areas from which interface structures are electrochemically grown. Dependent on the amount of grown metal, the interface structure is formed either as a stud bump protruding from the hole or as a flange overlapping the hole and supporting itself on the layer surface surrounding the hole. The structure's contacting surface may be planed for an area contact with the probe end of a buckling beam.
    Type: Grant
    Filed: November 24, 2000
    Date of Patent: May 27, 2003
    Assignee: Kulicke & Soffa Investment, Inc.
    Inventor: January Kister
  • Publication number: 20030090001
    Abstract: A wirebonded semiconductor package structure that provides for high frequency operation, a large number of I/O terminals, controlled low impedance, compensated inductance, electromagnetic shielding against cross-talk and prevention of false signals from ground bounce includes a semiconductor device, a semiconductor package substrate and a wirebond(s) electrically connecting the semiconductor device to the semiconductor package substrate. The wirebonded semiconductor package structure also includes a first insulating encapsulant layer at least partially encapsulating the wirebond(s) and a conductor layer (e.g., a patterned gold conductor layer) disposed on the first insulating encapsulant layer and electrically connected to the semiconductor package substrate. A method for manufacturing such a wirebonded semiconductor package includes wirebonding a semiconductor device (i.e.
    Type: Application
    Filed: November 13, 2001
    Publication date: May 15, 2003
    Applicant: KULICKE AND SOFFA INVESTMENTS, INC.
    Inventors: David T. Beatson, Andrew F. Hmiel
  • Patent number: 6562698
    Abstract: A method for singulating semiconductor wafers comprises the steps of aiming a first and a second laser beam over a top surface of the substrate; forming scribe lines in the coating layer by scanning the first laser beam across the coating layer; and cutting through the substrate along the scribe lines with the second laser beam to form a respective kerf. The apparatus includes a first laser having a first wavelength placed over the coating layer of the substrate, and a second laser having a second wavelength different from that of the first laser placed over a surface of the substrate. The coating layer has a first absorption coefficient relative to a wavelength of the first laser and the semiconductor substrate has a second absorption coefficient less than the first absorption coefficient. Energy from the first laser beam is absorbed into the coating layer to form scribe lines therein, and the second laser beam cuts through the substrate along the scribe lines.
    Type: Grant
    Filed: May 24, 2001
    Date of Patent: May 13, 2003
    Assignee: Kulicke & Soffa Investments, Inc.
    Inventor: Ran Manor
  • Publication number: 20030079640
    Abstract: A method of producing a macrocomposite linear guideway, wherein the “traditional” or existing rail material (e.g., hardened steel) is maintained as the wear resistant, low friction material in a layer having a surface intended to be in physical contact with one or more bearings, and further wherein this layer is supported by a substrate comprising a stiff, lightweight material. The wear resistant layer is attached to the substrate by a coating process. A linear guideway is also provided having a rail made of a lightweight stiff material on which is a hard bearing layer formed by a coating process.
    Type: Application
    Filed: October 28, 2002
    Publication date: May 1, 2003
    Applicant: Kulicke & Soffa Investments, Inc.
    Inventors: David T. Beatson, Eugene Walter Frasch
  • Patent number: 6555447
    Abstract: A method for laser scribing a semiconductor substrate with coatings on top. The method comprises the steps of focusing a laser beam on a top surface of the substrate coating; absorbing energy from the laser into the coating layer; forming a first set of scribe lines in a first direction on the substrate by scanning the laser beam across the surface of the substrate to evaporate portions of the coating layer; and forming a second set of scribe lines in a second direction on the surface of the substrate substantially orthogonal to the first set of scribe lines to evaporate portions of the layer.
    Type: Grant
    Filed: March 27, 2001
    Date of Patent: April 29, 2003
    Assignee: Kulicke & Soffa Investments, Inc.
    Inventors: Ilan Weishauss, Ran Manor, Oded Wertheim