Patents Assigned to Kwang-Youl Seo
  • Patent number: 7208365
    Abstract: Provided are a nonvolatile memory device and a method of manufacturing the same. The device includes a semiconductor substrate; a source region and a drain region disposed in the semiconductor substrate and a channel region interposed between the source and drain regions; a first tunnel oxide layer disposed on the channel region near the source region; a second tunnel oxide layer disposed on the channel region near the drain region; a first charge trapping layer disposed on the first tunnel oxide layer; a second charge trapping layer disposed on the second tunnel oxide layer; a blocking oxide layer covering the first and second charge trapping layers; a charge isolation layer interposed between the first and second charge trapping layers; and a gate electrode disposed on the blocking oxide layer.
    Type: Grant
    Filed: August 16, 2006
    Date of Patent: April 24, 2007
    Assignees: Samsung Electronics Co., Ltd., Kwang-youl Seo
    Inventors: Hee-soon Chae, Chung-woo Kim, Kwang-youl Seo, Tae-hyun Han, Byung-chul Kim, Joo-yeon Kim
  • Publication number: 20060273377
    Abstract: Provided are a nonvolatile memory device and a method of manufacturing the same. The device includes a semiconductor substrate; a source region and a drain region disposed in the semiconductor substrate and a channel region interposed between the source and drain regions; a first tunnel oxide layer disposed on the channel region near the source region; a second tunnel oxide layer disposed on the channel region near the drain region; a first charge trapping layer disposed on the first tunnel oxide layer; a second charge trapping layer disposed on the second tunnel oxide layer; a blocking oxide layer covering the first and second charge trapping layers; a charge isolation layer interposed between the first and second charge trapping layers; and a gate electrode disposed on the blocking oxide layer.
    Type: Application
    Filed: August 16, 2006
    Publication date: December 7, 2006
    Applicants: SAMSUNG ELECTRONICS CO., LTD., KWANG-YOUL SEO
    Inventors: Hee-soon Chae, Chung-woo Kim, Kwang-youl Seo, Tae-hyun Han, Byung-chul Kim, Joo-yeon Kim
  • Patent number: 7112842
    Abstract: Provided are a nonvolatile memory device and a method of manufacturing the same. The device includes a semiconductor substrate; a source region and a drain region disposed in the semiconductor substrate and a channel region interposed between the source and drain regions; a first tunnel oxide layer disposed on the channel region near the source region; a second tunnel oxide layer disposed on the channel region near the drain region; a first charge trapping layer disposed on the first tunnel oxide layer; a second charge trapping layer disposed on the second tunnel oxide layer; a blocking oxide layer covering the first and second charge trapping layers; a charge isolation layer interposed between the first and second charge trapping layers; and a gate electrode disposed on the blocking oxide layer.
    Type: Grant
    Filed: October 29, 2004
    Date of Patent: September 26, 2006
    Assignees: Samsung Electronics Co., Ltd., Kwang-Youl Seo
    Inventors: Hee-soon Chae, Chung-woo Kim, Kwang-youl Seo, Tae-hyun Han, Byung-chul Kim, Joo-yeon Kim
  • Publication number: 20050162958
    Abstract: Provided are a nonvolatile memory device and a method of manufacturing the same. The device includes a semiconductor substrate; a source region and a drain region disposed in the semiconductor substrate and a channel region interposed between the source and drain regions; a first tunnel oxide layer disposed on the channel region near the source region; a second tunnel oxide layer disposed on the channel region near the drain region; a first charge trapping layer disposed on the first tunnel oxide layer; a second charge trapping layer disposed on the second tunnel oxide layer; a blocking oxide layer covering the first and second charge trapping layers; a charge isolation layer interposed between the first and second charge trapping layers; and a gate electrode disposed on the blocking oxide layer.
    Type: Application
    Filed: October 29, 2004
    Publication date: July 28, 2005
    Applicants: Samsung Electronics Co., Ltd., Kwang-youl Seo
    Inventors: Hee-soon Chae, Chung-woo Kim, Kwang-youl Seo, Tae-hyun Han, Byung-chul Kim, Joo-yeon Kim