Patents Assigned to Kyocera America, Inc.
  • Patent number: 9331000
    Abstract: An electronics packaging system includes an insulator that electrically insulates a heat sink from electrical leads. An interface between the insulator and the heat sink includes a stress reliever constructed such that a stiffness of the interface is greater than the stiffness of the interface without the stress reliever.
    Type: Grant
    Filed: April 2, 2015
    Date of Patent: May 3, 2016
    Assignee: Kyocera America, Inc.
    Inventors: Mark Eblen, Franklin Kim, Chong Il-Park, Shinichi Hira
  • Patent number: 8547187
    Abstract: An impedance matching ground plane step, in conjunction with a quarter wave transformer section, in a printed circuit board provides a broadband microwave matching transition from board connectors or other elements that require thin substrates to thick substrate (>quarter wavelength) broadband microwave (millimeter wave) devices.
    Type: Grant
    Filed: September 30, 2010
    Date of Patent: October 1, 2013
    Assignees: Lawrence Livermore National Security, LLC., Kyocera America, Inc.
    Inventors: Hsueh-Yuan Pao, Jerardo Aguirre, Paul Sargis
  • Patent number: 7808341
    Abstract: A coaxial transition arrangement including a coaxial connector for connecting a coaxial cable to a multilayer package has an improved coaxial connector for accomplishing impedance matching and providing improved broadband performance. Impedance matching is provided by a metal disk structure comprising a plurality of metal disks mounted on a center conductor pin of the coaxial connector. The disks are mounted in spaced-apart relation on the center conductor pin and have different radiuses which decrease with increasing distance from the base of the center conductor pin. The coaxial connector has a shroud which is configured to accommodate the metal disk structure therein, as does the ring of ground vias forming a part of the multilayer package.
    Type: Grant
    Filed: February 21, 2007
    Date of Patent: October 5, 2010
    Assignee: Kyocera America, Inc.
    Inventor: Gerardo Aguirre
  • Patent number: 7582964
    Abstract: A semiconductor package for power transistors and the like has a heat sink flange with at least one die mounted thereon, a non-ceramic based window frame mounted thereon adjacent the die, and a plurality of leads mounted on the window frame and electrically coupled to the die by wire bonds. The non-ceramic based window frame is thermally matched to copper or other highly conductive material typically used for the flange, to facilitate assembly of the semiconductor package at high temperatures. The non-ceramic based window frame is flexible and is thermally matched to the highly conductive flange so as to expand and contract at a rate similar to the flange to prevent failure during assembly of the semiconductor package. The non-ceramic based material of the window frame includes a matrix of principally organic material, such as polytetrafluorethylene, filled with fibers which may be glass fibers or ceramic fibers.
    Type: Grant
    Filed: November 19, 2007
    Date of Patent: September 1, 2009
    Assignee: Kyocera America, Inc.
    Inventors: Jeffrey Venegas, Paul Garland, Joshua Lobsinger, Linda Luu
  • Publication number: 20080142963
    Abstract: A semiconductor package for power transistors and the like has a heat sink flange with at least one die mounted thereon, a non-ceramic based window frame mounted thereon adjacent the die, and a plurality of leads mounted on the window frame and electrically coupled to the die by wire bonds. The non-ceramic based window frame is thermally matched to copper or other highly conductive material typically used for the flange, to facilitate assembly of the semiconductor package at high temperatures. The non-ceramic based window frame is flexible and is thermally matched to the highly conductive flange so as to expand and contract at a rate similar to the flange to prevent failure during assembly of the semiconductor package. The non-ceramic based material of the window frame includes a matrix of principally organic material, such as polytetrafluorethylene, filled with fibers which may be glass fibers or ceramic fibers.
    Type: Application
    Filed: November 19, 2007
    Publication date: June 19, 2008
    Applicant: KYOCERA AMERICA, INC.
    Inventors: Jeffrey VENEGAS, Paul GARLAND, Joshua LOBSINGER, Linda LUU
  • Patent number: 7298046
    Abstract: A semiconductor package for power transistors and the like has a heat sink flange with at least one die mounted thereon, a non-ceramic based window frame mounted thereon adjacent the die, and a plurality of leads mounted on the window frame and electrically coupled to the die by wire bonds. The non-ceramic based window frame is thermally matched to copper or other highly conductive material typically used for the flange, to facilitate assembly of the semiconductor package at high temperatures. The non-ceramic based window frame is flexible and is thermally matched to the highly conductive flange so as to expand and contract at a rate similar to the flange to prevent failure during assembly of the semiconductor package. The non-ceramic based material of the window frame includes a matrix of principally organic material, such as polytetrafluoroethylene, filled with fibers which may be glass fibers or ceramic fibers.
    Type: Grant
    Filed: January 10, 2003
    Date of Patent: November 20, 2007
    Assignee: Kyocera America, Inc.
    Inventors: Jeffrey Venegas, Paul Garland, Joshua Lobsinger, Linda Luu
  • Patent number: 7053729
    Abstract: High frequency matching in a multilayer ceramic package is accomplished by a radial stub arrangement provided in one or more of the ground planes of a stack of layers forming the package. A signal via extends vertically upwardly between a ball grid array at a bottom surface of the stack and a coplanar waveguide in the form of a signal trace on a top surface of the stack. Each radial stub arrangement surrounds the signal via and is formed by a central space in the ground plane which surrounds the via and a plurality of stub-forming spaces in the ground plane which extend radially outwardly from the central space. The stub-forming spaces form a plurality of radial stubs which extends inwardly from the ground plane to locations adjacent but spaced apart from the signal via. The discontinuities provided by the spaces behave as a shunt inductance connected to a series capacitance.
    Type: Grant
    Filed: August 23, 2004
    Date of Patent: May 30, 2006
    Assignee: Kyocera America, Inc.
    Inventors: Gerardo Aguirre, Christopher Gordon
  • Patent number: 6900525
    Abstract: A semiconductor package to which a potential difference is applied has two or more of the components thereof bound together using a filler metal. The filler metal is a solid solution structure in which the metallic components are atomically dispersed, and may comprise an alloy of gold, silver and copper. A preferred form of the filler metal comprises 60Au20Ag20Cu. Such filler metals in accordance with the invention provide the advantages of silver-based filler metals without the silver migration that leads to eventual shorting of the semiconductor package. When water condenses to form a continuous layer thereof within the semiconductor package due to moisture seeping into the package and temperature changes, the silver within the filler metal does not ionize, and therefore a buildup of silver deposits and eventual shorting of the package does not occur.
    Type: Grant
    Filed: May 21, 2003
    Date of Patent: May 31, 2005
    Assignee: Kyocera America, Inc.
    Inventors: Joshua David Lobsinger, Michael John Shane, Ronaldo Francisco Hernandez Brosas
  • Publication number: 20040232529
    Abstract: A semiconductor package to which a potential difference is applied has two or more of the components thereof bound together using a filler metal. The filler metal is a solid solution structure in which the metallic components are atomically dispersed, and may comprise an alloy of gold, silver and copper. A preferred form of the filler metal comprises 60Au20Ag20Cu. Such filler metals in accordance with the invention provide the advantages of silver-based filler metals without the silver migration that leads to eventual shorting of the semiconductor package. When water condenses to form a continuous layer thereof within the semiconductor package due to moisture seeping into the package and temperature changes, the silver within the filler metal does not ionize, and therefore a buildup of silver deposits and eventual shorting of the package does not occur.
    Type: Application
    Filed: May 21, 2003
    Publication date: November 25, 2004
    Applicant: Kyocera America, Inc.
    Inventors: Joshua David Lobsinger, Michael John Shane, Ronaldo Francisco Hernandez Brosas
  • Publication number: 20040195662
    Abstract: A semiconductor package for power transistors and the like has a heat sink flange with at least one die mounted thereon, a non-ceramic based window frame mounted thereon adjacent the die, and a plurality of leads mounted on the window frame and electrically coupled to the die by wire bonds. The non-ceramic based window frame is thermally matched to copper or other highly conductive material typically used for the flange, to facilitate assembly of the semiconductor package at high temperatures. The non-ceramic based window frame is flexible and is thermally matched to the highly conductive flange so as to expand and contract at a rate similar to the flange to prevent failure during assembly of the semiconductor package. The non-ceramic based material of the window frame includes a matrix of principally organic material, such as polytetrafluorethylene, filled with fibers which may be glass fibers or ceramic fibers.
    Type: Application
    Filed: January 10, 2003
    Publication date: October 7, 2004
    Applicant: KYOCERA AMERICA, INC.
    Inventors: Jeffrey Venegas, Paul Garland, Joshua Lobsinger, Linda Luu
  • Patent number: 6796725
    Abstract: An opto-electronic package includes an enclosed package, a plurality of the electrical contacts extending into the enclosed package, an optical integrated circuit mounted within the package and coupled to the electrical contacts, and optical fibers extending through opposite ends of the package to the optical integrated circuit along a common plane. The package is comprised of a package body and an opposite package lid joined together by solder sealing at an interface substantially at the common plane, and configured to form end pipes around the optical fibers and solder sealed therewith at the opposite ends of the package, to form a hermetically sealed package. This enables the optical fibers to be laid into feedthroughs formed by opposing portions of the package body and the package lid before they are joined together.
    Type: Grant
    Filed: October 5, 2001
    Date of Patent: September 28, 2004
    Assignee: Kyocera America, Inc.
    Inventors: Benne Velsher, John F. Boehm
  • Patent number: 6727117
    Abstract: A semiconductor package for power transistors of the LDMOS type has a metallic substrate with a die mounted directly thereon, lead frame insulators mounted thereon adjacent the die and a plurality of leads mounted on the insulators and electrically coupled to the die by bond wires. The substrate includes a body having opposite surfaces comprising pure copper layers, and with the body interior being at least partially comprised of a copper/diamond composite so as to act as a heat spreader and provide improved heat removal and low thermal expansion, as well as an electrical connection for the die. The body may be entirely comprised of a copper/diamond composite, or it may be comprised of a copper/tungsten composite having a copper/diamond composite insert therein. The copper/diamond composite is comprised of diamond particles within a copper matrix.
    Type: Grant
    Filed: November 7, 2002
    Date of Patent: April 27, 2004
    Assignee: Kyocera America, Inc.
    Inventor: John Washington McCoy
  • Patent number: 6703559
    Abstract: Feedthrough apparatus has a metal housing with an opening therein and a base having a surface at the opening. A ceramic feedthrough extends through the opening in the housing and forms an interface therewith, and is brazed to the housing at the interface. The surface of the base extends at least to the feedthrough and has a cut-out area or opening therein adjacent the feedthrough in order to minimize the surface area contact at the interface between the ceramic feedthrough and the metal housing. The opening in the base may have edges which extend from sidewalls of the feedthrough under the feedthrough by small distances, in order to form a small ledge beneath the outer periphery of the feedthrough. Alternatively, the opening in the base may be approximately equal in size to the feedthrough so as to have edges which engage sidewalls of the feedthrough.
    Type: Grant
    Filed: July 19, 2001
    Date of Patent: March 9, 2004
    Assignee: Kyocera America, Inc.
    Inventors: Franklin Kim, Eiji Watanabe, Nobuo Takeshita
  • Publication number: 20030068141
    Abstract: An opto-electronic package includes an enclosed package, a plurality of the electrical contacts extending into the enclosed package, an optical integrated circuit mounted within the package and coupled to the electrical contacts, and optical fibers extending through opposite ends of the package to the optical integrated circuit along a common plane. The package is comprised of a package body and an opposite package lid joined together at an interface substantially at the common plane, and configured to form end pipes around the optical fibers at the opposite ends of the package. This enables the optical fibers to be laid into feedthroughs formed by opposing portions of the package body and the package lid before they are joined together, eliminating the need to feed the fibers through opposite apertures in the package body and for a separate subassembly to mount the opposite fibers and the integrated circuit.
    Type: Application
    Filed: October 5, 2001
    Publication date: April 10, 2003
    Applicant: Kyocera America Inc.
    Inventors: Benne Velsher, John F. Boehm
  • Publication number: 20030015350
    Abstract: Feedthrough apparatus has a metal housing with an opening therein and a base having a surface at the opening. A ceramic feedthrough extends through the opening in the housing and forms an interface therewith, and is brazed to the housing at the interface. The surface of the base extends at least to the feedthrough and has a cut-out area or opening therein adjacent the feedthrough in order to minimize the surface area contact at the interface between the ceramic feedthrough and the metal housing. The opening in the base may have edges which extend from sidewalls of the feedthrough under the feedthrough by small distances, in order to form a small ledge beneath the outer periphery of the feedthrough. Alternatively, the opening in the base may be approximately equal in size to the feedthrough so as to have edges which engage sidewalls of the feedthrough.
    Type: Application
    Filed: July 19, 2001
    Publication date: January 23, 2003
    Applicant: Kyocera America, Inc.
    Inventors: Franklin Kim, Eiji Watanabe, Nobuo Takeshita
  • Patent number: 6441697
    Abstract: RF feedthroughs for use with monolithic microwave integrated circuits (MMIC) are installed in environmentally protective or hermetically sealed packages that provide electromagnetic shielding. A feedthrough for an MMIC package has a dielectric substrate, a microstrip or transmission line formed on the substrate for transmitting high frequency electronic signals and a wall disposed above the transmission line and the substrate. The wall of the feedthrough has a varying thickness so that the narrowest portion of the wall is disposed on the transmission line substantially perpendicular to the substrate. The transmission line also has a varying width so that the narrowest width portion of the transmission line crosses the narrowest portion of the wall. The narrowest portion of the wall may be created by placing two oppositely facing concaved surfaces on each side of the wall. To reduce parasitic capacitance, the substrate and the wall may each have an air cavity embedded in respective bodies.
    Type: Grant
    Filed: January 27, 1999
    Date of Patent: August 27, 2002
    Assignee: Kyocera America, Inc.
    Inventors: Paul Garland, James Kyo Long, Yozo Satoda, Chong-Il Park
  • Patent number: 6204448
    Abstract: A hermetically sealed package assembly for microwave circuits in the high microwave frequencies having a dielectric gap defined in the substrate. The package assembly comprises a substrate for carrying the circuit on a top surface, a seal ring wall carried on the top surface, a via structure provided through the substrate for transmitting high-frequency signals into and out of the package, and a conducive lead carried on the bottom surface of the substrate and passes under the seal ring wall. A dielectric gap is provided in the substrate between the seal ring wall and the lead to reduce the capacitive coupling between the lead and the wall. The gap may be a sealed cavity provided inside the substrate, or a cutout area in the substrate so that the lead is suspended in air at the location where it passes under the seal ring wall.
    Type: Grant
    Filed: December 4, 1998
    Date of Patent: March 20, 2001
    Assignee: Kyocera America, Inc.
    Inventors: Paul Garland, James Kyo Long, Yozo Satoda, Chong-il Park
  • Patent number: 6046707
    Abstract: A small and durable antenna for use with radio and microwave communications is formed as a helical conductor contained in a multilayered non-ferrite ceramic chip. The dielectric constant of the ceramic is selected to match the antenna to its operating frequency, which may be in the range of 0.5 to 10.0 Gigahertz. A process for making such antennas is also disclosed. The antenna may be used in portable terminals and other devices requiring small, durable and inexpensive antennae.
    Type: Grant
    Filed: July 2, 1997
    Date of Patent: April 4, 2000
    Assignee: Kyocera America, Inc.
    Inventors: Frank J. Gaughan, Aki Nomura, Kiyoshi Hatakeyama, John Washington McCoy, Yoichi Hamano
  • Patent number: 5482735
    Abstract: A method for making multi-layer ceramic packages. The method provides for attaching contact pins to a ceramic substrate after the application of an intermediate metal layer and an outer metal layer. This eliminates plating the contact pins with an intermediate metal layer and an outer metal layer, thereby saving material and process time.
    Type: Grant
    Filed: September 2, 1994
    Date of Patent: January 9, 1996
    Assignee: Kyocera America, Inc.
    Inventors: Nobuaki Miyauchi, Takatoshi Irie
  • Patent number: 5345038
    Abstract: A method for making multi-layer ceramic packages. The method provides for attaching contact pins to a ceramic substrate after the application of an intermediate metal layer and an outer metal layer. This eliminates plating the contact pins with an intermediate metal layer and an outer metal layer, thereby saving material and process time.
    Type: Grant
    Filed: July 29, 1991
    Date of Patent: September 6, 1994
    Assignee: Kyocera America, Inc.
    Inventors: Nobuaki Miyauchi, Takatoshi Irie