Abstract: A solid electrolytic capacitor containing a capacitor element is provided. The capacitor element contains a sintered porous anode body, a dielectric that overlies the anode body, a solid electrolyte that overlies the dielectric, wherein the solid electrolyte includes a conductive polymer layer, and a moisture barrier that overlies the conductive polymer layer.

Abstract: A low inductance component may include a multilayer, monolithic device including a first active termination, a second active termination, at least one ground termination, and a pair of capacitors connected in series between the first active termination and the second active termination. The lead(s) may be coupled with the first active termination, second active termination, and/or the at least one ground termination. The lead(s) may have respective length(s) and maximum width(s). A ratio of the length(s) to the respective maximum width(s) of the lead(s) may be less than about 20.

Abstract: A method for monitoring one or more characteristics of an ultracapacitor is provided. The method includes obtaining a plurality of voltage measurements. Each of the voltage measurements can be obtained sequentially at one of a plurality of intervals. Furthermore, each of the voltage measurements can be indicative of a voltage across the ultracapacitor. The method can include determining an actual voltage step of the ultracapacitor based on two consecutive voltage measurements of the plurality of voltage measurements. The method can further include determining whether the actual voltage step exceeds a threshold voltage step of the ultracapacitor. Furthermore, in response to determining the actual voltage step exceeds the threshold voltage, the method can include providing a notification associated with performing a maintenance action on the ultracapacitor.

Abstract: A multilayer electronic device may include a plurality of dielectric layers and a signal path having an input and an output. An inductor may include a conductive layer formed on one of the plurality of dielectric layers and may be electrically connected at a first location with the signal path and electrically connected at a second location with at least one of the signal path or a ground. The inductor may include an outer perimeter that includes a first straight edge facing outward in a first direction and a second straight edge parallel to the first straight edge and facing outward in the first direction. The second straight edge may be offset from the first straight edge by an offset distance that is less than about 500 microns and less than about 90% of a first width of the inductor in the first direction at the first straight edge.

Abstract: A multilayer electronic device may include a plurality of dielectric layers stacked in a Z-direction that is perpendicular to an X-Y plane. The device may include a first conductive layer overlying one of the plurality of dielectric layers. The multilayer electronic device may include a second conductive layer overlying another of the plurality of dielectric layers and spaced apart from the first conductive layer in the Z-direction. The second conductive layer may overlap the first conductive layer in the X-Y plane at an overlapping area to form a capacitor. The first conductive layer may have a pair of parallel edges at a boundary of the overlapping area and an offset edge within the overlapping area that is parallel with the pair of parallel edges. An offset distance between the offset edge and at least one of the pair of parallel edges may be less than about 500 microns.

Abstract: A contact for a wire-to-wire electrical connector includes a first contact portion defining a first wire receiving opening to receive a first wire and a second wire receiving opening to receive a second wire. The contact further includes a splice contact portion abutting the first contact portion and defining a third wire receiving opening to receive a third wire. The first contact portion also includes a first plurality of contact tines to electrically connect the first wire and the second wire and the splice contact portion includes a second plurality of contact tines to electrically connect the third wire to the first wire and the second wire.

Abstract: An electrode assembly for an ultracapacitor is provided. The electrode assembly contains a first electrode comprising a first current collector electrically coupled to a first carbonaceous coating, a second electrode comprising a second current collector electrically coupled to a second carbonaceous coating, and a separator positioned between the first electrode and the second electrode. At least a portion of the first current collector projects beyond the first longitudinal edge to define a first projecting portion, wherein the offset ratio of the first projecting portion is from about 0.02 to about 0.3.

Abstract: A multilayer filter may include a signal path having an input, an output, and a conductive layer overlying at least one of a plurality of dielectric layers. The conductive layer may be elongated in the first direction and may have a first edge aligned with the first direction and a second edge parallel with the first edge. The conductive layer may include a protrusion extending in the second direction and having an end edge that is parallel with the first edge and offset from the first edge in the second direction by a protrusion length that is greater than about 50 microns. The multilayer filter may include an inductor that is electrically connected at a first location with the signal path and electrically connected at a second location with at least one of the signal path or a ground.

Abstract: The present invention is directed to a multilayer ceramic capacitor that includes a plurality of active electrodes and at least one shield electrode that are each arranged within a monolithic body and parallel with a longitudinal direction. The capacitor may exhibit a first insertion loss value at a test frequency, which may be greater than about 2 GHz, in a first orientation relative to the mounting surface. The capacitor may exhibit a second insertion loss value at about the test frequency in a second orientation relative to the mounting surface and the capacitor is rotated 90 degrees or more about the longitudinal direction with respect to the first orientation. The longitudinal direction of the capacitor may be parallel with the mounting surface in each of the first and second orientations. The second insertion loss value may differ from the first insertion loss value by at least about 0.3 dB.

Abstract: A solid electrolytic capacitor containing a capacitor element is provided. The capacitor element contains a sintered porous anode body, a dielectric that overlies the anode body, a solid electrolyte that overlies the dielectric, and an external coating that overlies the solid electrolyte and includes conductive polymer particles. The solid electrolyte includes an intrinsically conductive polymer containing repeating thiophene units of a certain formula.

Abstract: A multilayer filter may include a signal path having an input, an output, and a conductive layer overlying at least one of a plurality of dielectric layers. The conductive layer may be elongated in the first direction and may have a first edge aligned with the first direction and a second edge parallel with the first edge. The conductive layer may include a protrusion extending in the second direction and having an end edge that is parallel with the first edge and offset from the first edge in the second direction by a protrusion length that is greater than about 50 microns. The multilayer filter may include an inductor that is electrically connected at a first location with the signal path and electrically connected at a second location with at least one of the signal path or a ground.

Abstract: A method of screening a lot of capacitors is provided. The method includes measuring a first leakage current of each individual capacitor in a first set of capacitors and calculating a first mean leakage current; removing each of the individual capacitors having a measured first leakage current equal to or above a first predetermined value, forming a second set of capacitors; subjecting the second set of capacitors to a burn in treatment; measuring a second leakage current for each of the individual capacitors in the second set and calculating a second mean leakage current; comparing the second leakage current for each of the individual capacitors to the first leakage current for each of the individual capacitors; and removing each of the individual capacitors having a second leakage current equal to or above a second predetermined value and/or having a second leakage current that does not change by a specified amount compared to the first leakage current for each of the individual capacitors.

Abstract: This disclosure provides a method and apparatus for connecting wires and interlocking wires to an electrical component. More specifically, an electrical connector that includes an insulative housing, two electrical contacts, and two interlocking contacts is disclosed. In an embodiment, each electrical contact includes a female end, a press-fit end, and a transition portion. The transition portion is designed such that the first female end and the first press-fit end may be properly aligned depending on the application. The transition portion also provides support and stability to the electrical contacts when they are disposed within the insulative housing. The insulative housing includes four contact recesses. In an embodiment, the electrical connector allows for the safe, efficient, re-usable, and reliable connection for connecting high-voltage wires to a corresponding sensitive electrical component (e.g., a printed circuit board).

Abstract: A surface mountable coupler may include a monolithic base substrate having a first surface, a second surface, a length in an X-direction, and a width in a Y-direction that is perpendicular to the X-direction. A plurality of ports may be formed over the first surface of the monolithic base substrate including a coupling port, an input port, and an output port. The coupler may include a first thin film inductor and a second thin film inductor that is inductively coupled with the first thin film inductor and electrically connected between the input and output ports. A thin film circuit may electrically connect the first thin film inductor with the coupling port. The thin film circuit may include at least one thin film component.

Abstract: A high frequency, stripline filter may have a bottom surface for mounting to a mounting surface. The filter may include a monolithic base substrate having a top surface and a plurality of thin-film microstrips, including a first thin-film microstrip and a second thin-film microstrip, formed over the top surface of the substrate. Each of the plurality of thin-film microstrips may have a first arm, a second arm parallel to the first arm, and a base portion connected with the first and second arms. A port may be exposed along the bottom surface of the filter. A conductive path may include a via formed in the substrate. The conductive path may electrically connect the first thin-film microstrip with the port on the bottom surface of the filter. The filter may exhibit an insertion loss that is greater than ?3.5 dB at a frequency that is greater than about 15 GHz.

Abstract: A surface-mountable thin-film fuse component is disclosed that may include a substrate having a top surface, a first end, and a second end that is spaced apart from the first end in a longitudinal direction. The thin-film component may include a fuse layer formed over the top surface of the substrate. The fuse layer may include a thin-film fuse track. An external terminal may be disposed along the first end of the substrate and electrically connected with the thin-film fuse track. The external terminal may include a compliant layer comprising a conductive polymeric composition.

Abstract: A solid electrolytic capacitor comprising a capacitor element, anode lead extending from a surface of the capacitor element, an anode termination that is in electrical connection with the anode lead, a cathode termination that is in electrical connection with the solid electrolyte, and a casing material that encapsulates the capacitor element and anode lead is provided. A barrier coating is disposed on at least a portion of the anode termination and/or cathode termination and is in contact with the casing material. The coating contains a hydrophobic resinous material that includes an olefin polymer having a glass transition temperature of from about 20° C. to about 160° C.

Abstract: An electrical circuit is provided including a substrate having a generally planar surface. A supercapacitor assembly includes a container having a length in a longitudinal direction. The supercapacitor assembly includes an electrode assembly enclosed within the container, and the electrode assembly may have a jelly-roll configuration. An angle ranging from about 0 to about 30 degrees is formed between the longitudinal direction of the container and the generally planar surface of the substrate.

Abstract: A capacitor assembly that is capable of exhibiting good electrical properties even under a variety of conditions is provided. More particularly, the capacitor contains a capacitor element that includes a porous anode body that contains a valve metal compound, a dielectric that overlies the anode body and includes an oxide of the valve metal compound, a solid electrolyte that overlies the dielectric, wherein the solid electrolyte includes at least one conductive polymer layer that contains a sulfonyl ion, and an organofunctional silane that is bonded to the oxide of the dielectric and is capable of bonding to the sulfonyl ion of the conductive polymer layer.

Abstract: A solid electrolytic capacitor comprising a capacitor element that contains a sintered porous anode body formed from a valve metal powder having a specific charge of about 50,000 ?F*V/g or more, a dielectric that overlies the anode body, and a solid electrolyte that overlies the dielectric that includes a conductive polymer is provided. The capacitor exhibits an anomalous charging current of about 0.25 amps or less when charged at a constant voltage rate increase of 120 volts per second, determined at a temperature of 23° C. and voltage of 16 volts.