Patents Assigned to Kyocera International, Inc.
  • Patent number: 11942703
    Abstract: A phased array antenna includes multiple antenna elements where each antenna element is an antenna apparatus that includes an antenna integrated with a filter. Each antenna apparatus includes a plurality of resonators where at least some of the resonators are each enclosed in a metal cavity and at least one resonator is exposed to free space to form a radiator element. Each antenna apparatus has a filter transfer function that is at least partially determined by dimensions of the radiator element and the position of the radiator element within the antenna apparatus. The scan volume of the phased array antenna is dependent on at least one physical dimension of the filter of the antenna apparatus.
    Type: Grant
    Filed: September 7, 2022
    Date of Patent: March 26, 2024
    Assignee: Kyocera International, Inc.
    Inventors: Carlos Carceller, Andy Piloto, Kawthar A. Zaki, Ali Atia, Joseph Tallo, Tyler Reid
  • Patent number: 11677155
    Abstract: An antenna apparatus includes an antenna integrated with a filter. The antenna apparatus includes a plurality of resonators where at least some of the resonators are each enclosed in a metal cavity and at least one resonator is exposed to free space to form a radiator element. The antenna apparatus has a filter transfer function that is at least partially determined by dimensions of the radiator element and the position of the radiator element within the antenna apparatus.
    Type: Grant
    Filed: September 27, 2022
    Date of Patent: June 13, 2023
    Assignee: Kyocera International, Inc.
    Inventors: Carlos Carceller, Andy Piloto, Kawthar A. Zaki, Ali Atia, Joseph Tallo, Tyler Reid
  • Patent number: 11677154
    Abstract: An antenna apparatus includes an antenna integrated with a filter. The antenna apparatus includes a plurality of resonators where at least some of the resonators are each enclosed in a metal cavity and at least one resonator is exposed to free space to form a radiator element. The antenna apparatus has a filter transfer function that is at least partially determined by dimensions of the radiator element and the position of the radiator element within the antenna apparatus.
    Type: Grant
    Filed: September 27, 2022
    Date of Patent: June 13, 2023
    Assignee: Kyocera International, Inc.
    Inventors: Carlos Carceller, Andy Piloto, Kawthar A. Zaki, Ali Atia, Joseph Tallo, Tyler Reid
  • Patent number: 11469506
    Abstract: An antenna apparatus includes an antenna integrated with a filter. The antenna apparatus includes a plurality of resonators where at least some of the resonators are each enclosed in a metal cavity and at least one resonator is exposed to free space to form a radiator element. The antenna apparatus has a filter transfer function that is at least partially determined by dimensions of the radiator element and the position of the radiator element within the antenna apparatus.
    Type: Grant
    Filed: January 15, 2020
    Date of Patent: October 11, 2022
    Assignee: Kyocera International, Inc.
    Inventors: Carlos Carceller, Andy Piloto, Kawthar A. Zaki, Ali Atia, Joseph Tallo, Tyler Reid
  • Patent number: 11444381
    Abstract: A phased array antenna includes multiple antenna elements where each antenna element is an antenna apparatus that includes an antenna integrated with a filter. Each antenna apparatus includes a plurality of resonators where at least some of the resonators are each enclosed in a metal cavity and at least one resonator is exposed to free space to form a radiator element. Each antenna apparatus has a filter transfer function that is at least partially determined by dimensions of the radiator element and the position of the radiator element within the antenna apparatus. The scan volume of the phased array antenna is dependent on at least one physical dimension of the filter of the antenna apparatus.
    Type: Grant
    Filed: January 15, 2020
    Date of Patent: September 13, 2022
    Assignee: Kyocera International, Inc.
    Inventors: Carlos Carceller, Andy Piloto, Kawthar A. Zaki, Ali Atia, Joseph Tallo, Tyler Reid
  • Patent number: 11424543
    Abstract: An antenna apparatus includes an antenna integrated with a filter. The antenna apparatus includes a plurality of planar resonators where at least some of the resonators are each enclosed in a metal cavity and at least one planar resonator is exposed to free space to form a radiator element. The antenna apparatus has a filter transfer function that is at least partially determined by dimensions of the planar radiator element and the position of the planar radiator element within the antenna apparatus.
    Type: Grant
    Filed: January 15, 2020
    Date of Patent: August 23, 2022
    Assignee: Kyocera International, Inc.
    Inventors: Carlos Carceller, Andy Piloto, Kawthar A. Zaki, Ali Atia, Joseph Tallo, Tyler Reid
  • Patent number: 11424053
    Abstract: A ceramic feedthrough assembly has a feedthrough interface sleeve brazed to a ceramic feedthrough body and a housing interface sleeve brazed to the feedthrough interface sleeve. The housing interface sleeve is configured to be integrated within an electronic device and welded to a metal housing to form a hermetically sealed electronic device. The ceramic feedthrough has at least one embedded electrical conductor extending from a first location on the ceramic feedthrough body to a second location on the ceramic feedthrough body. The feedthrough interface sleeve is positioned around the ceramic feedthrough body between the first location and the second location and brazed to the wrap-around metallization. When the metal housing is welded to the housing interface sleeve, the ceramic feedthrough assembly facilitates connection to an electronic circuit hermetically sealed in the electronic device with the metal housing.
    Type: Grant
    Filed: April 21, 2021
    Date of Patent: August 23, 2022
    Assignee: Kyocera International, Inc.
    Inventors: Franklin Kim, Mark Eblen, Hiroshi Makino, Shinichi Hira
  • Patent number: 11330699
    Abstract: Embodiments described herein are directed to methods and apparatus for power distribution. The apparatus can include a power distribution network for a plurality of integrated circuits (IC). According to embodiments, the power distribution network includes a plurality of overlapping power/ground (PG) plane segments and one or more non-overlapping PG (no-PG) plane segments. Each overlapping-PG plane segment is separated from another overlapping-PG plane segment by at least one no-PG plane segment. The no-PG plane segments can include at least one of a multilayered power (P) plane segment with no ground reference of any PG plane and a multilayered ground (G) plane segment with no power reference of any PG plane.
    Type: Grant
    Filed: December 14, 2017
    Date of Patent: May 10, 2022
    Assignees: San Diego State University Research Foundation, Kyocera International, Inc., Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V.
    Inventors: Arif Ege Engin, Gerardo Aguirre, Klaus-Dieter Lang, Ivan Ndip
  • Patent number: 10410959
    Abstract: Package deflection and mechanical stress of microelectronic packaging is minimized in a two step manufacturing process. In a first step, a ceramic insulator is high-temperature bonded between a wraparound lead layer and a buffer layer of a same material as the lead layer to provide a symmetrically balanced three-layer structure. In a second step, the three-layer structure is high temperature bonded, using a lower melt point braze, to a heat spreader. This package configuration minimizes package deflection, and thereby improves thermal dissipation and reliability of the package.
    Type: Grant
    Filed: June 22, 2018
    Date of Patent: September 10, 2019
    Assignee: Kyocera International, Inc.
    Inventors: Franklin Kim, Mark Eblen, Shinichi Hira
  • Patent number: 10236267
    Abstract: Forming the chip attachment system includes obtaining a chip having a bump core on a die. The method also includes obtaining an intermediate structure having a transfer pad on a substrate. The method further includes transferring the transfer pad from the substrate to the bump core such that the transfer pad becomes a solder layer on the bump core.
    Type: Grant
    Filed: July 31, 2015
    Date of Patent: March 19, 2019
    Assignee: Kyocera International, Inc.
    Inventor: Dinah Lieu
  • Patent number: 9859185
    Abstract: A semiconductor packaging structure includes a copper heat-sink with a shim projection which provides a stress release structure. The heat-sink with the shim projection may be used in conjunction with a pedestal in order to further reduce the thermal stress produced from the mismatch of thermal properties between the copper heat-sink metal and the ceramic frame. The copper heat-sink with a shim projection may also be part of the semiconductor package along with a lead frame, the ceramic frame, a semiconductor device, a capacitor, a wire bond and a ceramic lid or an encapsulation. The copper heat-sink, the ceramic frame and the lead frame are all chosen to be cost effective, and chosen such that the packaging process for the semiconductor device is able to achieve a smaller size while maintaining high reliability, low cost, and suitability for volume manufacturing.
    Type: Grant
    Filed: January 27, 2017
    Date of Patent: January 2, 2018
    Assignee: Kyocera International, Inc.
    Inventors: Satoru Tomie, Mark Eblen, Eiji Watanabe, Eiji Tanaka
  • Patent number: 4660907
    Abstract: A multiple pin connector comprising a pin-support body, a filter block, a ground plane, and a dielectric retainer block, through which a plurality of pin contacts extend in a parallel, space the part alignment for engaging complementarily positioned contacts on meeting conductors. The ground plane includes flanges extending around opposed edges of the filter block. The filter block is formed to have a recess therein adjacent each pin location and extending therefrom to an edge of the filter block proximate to the flange of the ground plane. A chip capacitors having a capacitance value appropriate to a desired level of electromagnetic interference protection is inserted in each recess of the filter block. Electrical connections are maintained between the pin contacts and the individual chip capacitors, and the individual chip capacitors and the flanges of the ground plane, by means of solder bridges appropriately disposed.
    Type: Grant
    Filed: June 20, 1985
    Date of Patent: April 28, 1987
    Assignee: Kyocera International, Inc.
    Inventor: Robert E. Belter
  • Patent number: 4404935
    Abstract: A ceramic cap is attached to a metal piston by means of intermeshing radial flanges. A spring forces the flanges into contact with one another along an annular surface area. Spaces between the flanges allow for movement between the metal and ceramic parts to accommodate differential thermal expansion, while at the same time permitting secure contact between metal and ceramic.
    Type: Grant
    Filed: April 27, 1981
    Date of Patent: September 20, 1983
    Assignee: Kyocera International, Inc.
    Inventor: Edwin H. Kraft
  • Patent number: 4232815
    Abstract: A device and method for coupling leads to integrated circuit packages via lead frame rail members. The lead frame rail members consist of resilient leads coupled to a first rail and other resilient leads coupled to a second rail. The first rail is connected to the second rail such that the leads of the first rail are separated from and oppose the leads of the second rail. The coupling device consists of a main frame, a spreading means, an insertion means, and a releasing means. The spreading means is coupled to the main frame and is adapted to spread the leads of each rail of a lead frame rail member away from the opposing leads of the other rail such that an integrated circuit package can be inserted between the opposing leads at intervals along the rail member. The insertion means is coupled to the main frame and is adapted to insert coupling material between the integrated circuit packages and the leads.
    Type: Grant
    Filed: November 6, 1978
    Date of Patent: November 11, 1980
    Assignee: Kyocera International, Inc.
    Inventors: Masahiko Nakano, Nobuaki Miyauchi