Abstract: The invention relates to a digital loop sharing telephone system and also to a digital telephone for connection into such a system. The loop may be for a parallel telephone system or a party-line system. Each telephone is adapted to transmit data in an upstream direction on the loop, that is towards an exchange of the system, which data may originate from the telephone itself or a further telephone downstream thereof. Each telephone includes code detector circuitry and logic circuitry whereby if the telephone is the first to change to an off-hook or active condition it "seizes" the loop for exclusive data transmission to the exchange. In the case of a parallel telephone system any telephone going off-hook can receive incoming data from the exchange but only the first telephone to go off-hook can send data. In the case of a party-line system only the telephone which seizes the loop can receive data.

Abstract: The invention relates to method of interconnecting terminal devices in a digital telephone network wherein either the terminal devices in question normally operate at different data rates or they are to be interconnected over data links in the network which normally operate at different data rates. The method involves firstly determining, by processor means at a switching point in the network, the normal data bit rate of two terminals to be interconnected as well as the normal data bit rate of the or each data link over which the connection is to be made. In the case where there is a difference in the normal data bit rates the processor initiates a procedure to send a digital bit stream to one or both of the terminals to cause the terminals to operate, in the course of the connection, at a common data rate equal to the lowest of the normal data bit rates of said terminals and said data link.

Abstract: A digital switch for switching word formatted PCM digital data is disclosed. The data of each PCM word is serially bit switched rather than being switched in parallel as in conventional PCM switches. This is achieved by time multiplexing corresponding word bits of respective incoming channels or inlets onto a single data highway to form a bit interleaved digital bit stream. Data on the highway is switched through a RAM under control of a control memory according to the required connections so as to rearrange the order of the data bits. The rearranged data is demultiplexed to the respective outgoing channels or outlets. To avoid less of alignment of word boundaries at the outlets, as between respective channels, the switch determines those connections which incur a switch cycle delay relative to those which do not.

Abstract: The invention relates to a digital data switch for serially bit-switching word synchronized Pulse Code Modulated (PCM) data from inlets to outlets of the switch. The switch is particularly intended for use in situations wherein PCM data words arriving at the switch on different inlets are not aligned in so far as word boundaries are concerned. The PCM data is bi-polar or diphase modulated and the synchronization information of each word consists of a violation of the modulation. The switch includes a demodulator on each inlet for demodulating the data and a synchronization detect circuit associated with each demodulator for detecting the synchronization information in each incoming data word. The switch has two functionally identical time division multiplexed switch paths; one being a data path and the other being a by-path for switching the synchronization information.

Abstract: The disclosure describes a control memory for addressing inlet and outlet switching stages of a three stage digital switch. The control memory comprises two identical random access memories (RAM's) each having an address storage capacity equal to half the number of simplex connections which can be made through either stage of the switch. The arrangement described allows a large saving in the number of memory bits necessary to address the inlet and outlet switching stages and enables fast access of the control memory for the purpose of establishing or terminating connections.

Abstract: A code detector for detecting the presence or absence of particular binary digital signalling codes in the digital bit stream from extension telephones of a digital PABX telephone system. The detector is connected to a telephone being monitored and receives digital data from the telephone, which data may be random speech data or a signalling code. The detector consists essentially of a ROM which uses each of the data bits arriving in serial form as the least significant bits of the address for a micro-program stored in the ROM which provides the other address bits, thus causing the program to be stepped through a sequence of addresses which depend upon the sequence of the incoming data bits. For a program to end up at a specified address the ROM must receive the code which is unique in causing the program to arrive at that address. The detector then outputs a code representative of the detected code.

Abstract: A digital data switch of the time-space-time (TST) type for switching pulse code modulated (PCM) data is disclosed. The switch combines a parity bit with each PCM word being switched in a conventional way to supervise the internal operation of the switch. The invention consists of a method of using such a switch for checking that a correct or intended connection is made through the switch by inserting incorrect parity with PCM words to the input in question immediately after the connection is established and checking the outlets of the switch to determine the output/s having incorrect parity. The check is made by the central control of the switch which compares the output/s having incorrect parity with the intended output/s. A simple circuit arrangement for distinguishing deliberately introduced wrong parity from through connection faults is also disclosed.

Abstract: An average peak slope companded delta codec for converting an analog signal to a corresponding digital signal and vice versa includes a comparator which receives an analog signal and a variable reconstruction signal and converts the analog signal into a digital data bit stream. A detector is provided for detecting the presence of preselected sequences of bits in the digital bit stream. An attack/decay signal is generated wherein the signal increases upon the occurrence of the preselected sequence and decreases upon the non-occurrence of the preselected sequence with the ratio of the increase to decrease of the attack/decay signal being in the range of 30:1 to 500:1. A converter means receives the attack/decay signal and generates a compand signal which is substantially an anti-logarithmic function of the attack/decay signal wherein the rate of increase of the compand signal is in the range of 0.75 dB/bit period to 3.0 dB/bit period.

Abstract: The invention relates to a machine for manufacturing cable forms of the kind used, for example, in relay sets. The machine is fully automatic insofar as the cables are formed at least to the stage where each wire is terminated with the insulation stripped from the ends, the ends being arranged such that when the manufactured cable form is placed on the relay set or other apparatus the wire ends are in the optimum position for connection to the terminals of the apparatus. The machine comprises a holding table slidable along a longitudinal frame and supporting a plurality of holding clutches simulating the configuration of terminals which, in use, the wires will be connected. The holding clutches firmly hold the ends of wires being used to make the cable form. A rotary indexing head is mounted above the table and is adapted to actuate any one of a plurality of different wires into an operating position wherein it may be introduced into a holding clutch.

Abstract: A synchronous digital data switching apparatus in the form of a PABX telephone system is disclosed. The extension telephones of the apparatus are fully digital and transmit synchronous digital data to the switch. The switch includes a detector for scanning the inlets and remains connected to each inlet until the state of that inlet or a code is detected. Consequently the size of the switch is limited by the speed of available technology as all inlets must be examined within the minimum signalling period of any inlet. The telephones continually transmit digital data relevant to their state and also transmit digital codes during signalling. The apparatus is processor controlled and a switch memory for setting up connections between any inlet and any one or more outlets is time shared between the switch and processor.

Abstract: An apparatus for suppressing background noise in a companded delta modulated telephone system. The apparatus includes a comparator for comparing a signal related to the analogue input signal to an encoder of the system with a reference signal. The comparator provides an output to reduce the rate of occurrence of a succession of bits which cause companding within the encoder when the reference signal exceeds the other signal to the comparator. This is achieved by altering the step size of a feedback signal within the encoder or modifying the output from the encoder by removing or inverting one of the compand bits. The reference signal is higher than a signal generated by background noise and consequently for signals below the reference signal the decoder reconstructs an analogue signal which is lower in level than the input signal. A method for achieving the result is also claimed.

Abstract: A method and apparatus for switching PCM data in a telephone exchange wherein the switch is of the time-space-time (TST) type comprising a plurality of identical inter-connected groups, each group having two separate planes in which connections may be established. A plane select bit of data is added to each speech sample before switching through the space switching stage. The plane select bit influences a logic circuit at the switch output to determine which plane provides the outgoing data. For reliability connections are duplicated, that is, made in both planes until congestion occurs and when congestion occurs a new call is made in a path of one of the planes previously used for duplication. Information relevant to unduplicated connections is stored in a memory external to the switch to enable unduplicated connections to be re-established if they should be lost due to a fault.

Abstract: A digital control processor for controlling a number of relay sets from digital information received from a digital PABX. The digital control processor consists essentially of a first-in first-out memory and a combinational logic unit. The memory stores information relevant to an operation to be performed by the processor and re-cycles the information until the operation has been performed. The memory determines the action of the combinational logic unit which action includes changing the state of one of the relay sets. The action of the combinational logic unit is determined by time varying data states from the memory and/or from a relay set or sets. The digital control processor acts as an interface device between the digital/electronic world of the PABX and the analogue/mechanical world of the public exchange. The device receives digital information from a processor in the PABX and also monitors the current state of all the relay sets.