Abstract: Multicolor, stacked detector devices, focal plane arrays including multicolor, stacked detector devices, and methods of fabricating the same are disclosed. In one embodiment, a stacked multicolor detector device includes a first detector and a second detector. The first detector includes a first detector structure and a first ground plane adjacent the first detector structure. The second detector includes a second detector structure and a second ground plane adjacent the second detector structure. At least one of the first ground plane and the second ground plane is transmissive to radiation in a predetermined spectral band. The first detector and the second detector are in a stacked relationship.

Abstract: Analog counter circuits, read-out integrated circuits, and infrared detector devices are disclosed. In one embodiment, an analog counter circuit includes a first capacitor including a first terminal and a second terminal, a switch electrically coupled the first capacitor and a first voltage input, a field effect transistor, and a second capacitor. Setting the switch to an on-state pre-charges the first capacitor such that a voltage at the second terminal of the first capacitor is the first voltage. Applying a charge voltage at a charge input further charges the first capacitor. When a voltage at the second terminal of the first capacitor is greater than a threshold voltage of the field effect transistor, the field effect transistor turns on and transfers a charge on the first capacitor to the second capacitor.

Abstract: Methods of fabricating multicolor, stacked detector devices and focal plane arrays are disclosed. In one embodiment, a method of fabricating a stacked multicolor device includes forming a first detector by depositing a first detector structure on a first detector substrate, and depositing a first ground plane on the first detector structure, wherein the first ground plane is transmissive to radiation in a predetermined spectral band. The method further includes bonding an optical carrier wafer to the first ground plane, removing the first detector substrate, and forming a second detector. The second detector is formed by depositing a second detector structure on a second detector substrate, and depositing a second ground plane on the second detector structure. The method further includes depositing a dielectric layer on one of the first detector structure and the second ground plane, bonding the first detector to the second detector, and removing the second detector substrate.

Abstract: Embodiments described herein are directed to inrush current limiters having a transformer. In one embodiment, an inrush current limiter includes a transformer including a primary winding, a secondary winding and a saturable magnetic core shared therebetween, a resistor connected in parallel with the secondary winding, wherein an impedance of the resistor is reflected across the transformer when a voltage is applied across the primary winding and the saturable magnetic core is not saturated, and a diode connected between the primary winding and ground.

Abstract: Embodiments described herein are directed to inrush current limiters having a transformer. In one embodiment, an inrush current limiter includes a transformer including a primary winding, a secondary winding and a saturable magnetic core shared therebetween, a resistor connected in parallel with the secondary winding, wherein an impedance of the resistor is reflected across the transformer when a voltage is applied across the primary winding and the saturable magnetic core is not saturated, and a diode connected between the primary winding and ground.

Abstract: A regulated power supply includes a capacitively isolated feedback circuit and a pulse width modulator (PWM) operable to produce a plurality of pulses at an output and receive a sampled voltage at a feedback input thereof. The capacitively isolated feedback circuit includes a capacitively isolated gate drive circuit directly coupled to the PWM output and configured to produce a plurality of isolated pulses from the plurality of pulses received from the PWM output. The capacitively isolated feedback circuit also includes a forward converter feedback circuit, which includes a switching transistor directly coupled to the capacitively isolated gate drive circuit for receiving the plurality of isolated pulses at a gate of the switching transistor and a feedback transformer directly coupled to the PWM for providing the sampled voltage at the feedback input. The plurality of isolated pulses causes the feedback transformer to sample a load voltage as the sampled voltage.

Abstract: Satellite onboard imaging systems having a look-down view and a toroidal view of the Earth are disclosed. In one embodiment, a satellite onboard imaging systems include an infrared sensing system and a controller. The infrared sensing system includes a first imager configured to have a first field of view that observes a look-down view of the Earth from a satellite and a second imager configured to have a second field of view that observes a toroidal view of the Earth centered at the satellite. The controller is coupled to the first imager and the second imager and operable to process image data from the first imager and the second imager. The controller is further operable to output indications of thermal energy of an identical, or different objects based on the first thermal image signal, the second thermal image signal, or both.

Abstract: A regulated power supply includes a capacitively isolated feedback circuit and a pulse width modulator (PWM) operable to produce a plurality of pulses at an output and receive a sampled voltage at a feedback input thereof. The capacitively isolated feedback circuit includes a capacitively isolated gate drive circuit directly coupled to the PWM output and configured to produce a plurality of isolated pulses from the plurality of pulses received from the PWM output. The capacitively isolated feedback circuit also includes a forward converter feedback circuit, which includes a switching transistor directly coupled to the capacitively isolated gate drive circuit for receiving the plurality of isolated pulses at a gate of the switching transistor and a feedback transformer directly coupled to the PWM for providing the sampled voltage at the feedback input. The plurality of isolated pulses causes the feedback transformer to sample a load voltage as the sampled voltage.

Abstract: A direct bonding method for infrared focal plane arrays, includes steps of depositing a thin adhesion layer on infrared radiation detecting material, removing a portion of the thin adhesion layer with a chemical-mechanical polishing process, forming a bonding layer at a bonding interface, and bonding the infrared radiation detecting material to a silicon wafer with the thin adhesion layer as a bonding layer. The thin adhesion layer may include SiOx, where x ranges between 1.0 and 2.0. The thickness of the thin adhesion layer to form the bonding layer is 500 angstrom or less.

Abstract: A direct bonding method for infrared focal plane arrays, includes steps of depositing a thin adhesion layer on infrared radiation detecting material, removing a portion of the thin adhesion layer with a chemical-mechanical polishing process, forming a bonding layer at a bonding interface, and bonding the infrared radiation detecting material to a silicon wafer with the thin adhesion layer as a bonding layer. The thin adhesion layer may include SiOx, where x ranges between 1.0 and 2.0. The thickness of the thin adhesion layer to form the bonding layer is 500 angstrom or less.

Abstract: Methods of fabricating multicolor, stacked detector devices and focal plane arrays are disclosed. In one embodiment, a method of fabricating a stacked multicolor device includes forming a first detector by depositing a first detector structure on a first detector substrate, and depositing a first ground plane on the first detector structure, wherein the first ground plane is transmissive to radiation in a predetermined spectral band. The method further includes bonding an optical carrier wafer to the first ground plane, removing the first detector substrate, and forming a second detector. The second detector is formed by depositing a second detector structure on a second detector substrate, and depositing a second ground plane on the second detector structure. The method further includes depositing a dielectric layer on one of the first detector structure and the second ground plane, bonding the first detector to the second detector, and removing the second detector substrate.

Abstract: Multicolor, stacked detector devices, focal plane arrays including multicolor, stacked detector devices, and methods of fabricating the same are disclosed. In one embodiment, a stacked multicolor detector device includes a first detector and a second detector. The first detector includes a first detector structure and a first ground plane adjacent the first detector structure. The second detector includes a second detector structure and a second ground plane adjacent the second detector structure. At least one of the first ground plane and the second ground plane is transmissive to radiation in a predetermined spectral band. The first detector and the second detector are in a stacked relationship.

Abstract: Focal plane arrays and infrared detector device having a transparent common ground structure and methods of their fabrication are disclosed. In one embodiment, a front-side illuminated infrared detector device includes a contact layer and a detector structure adjacent to the contact layer. The detector structure is capable of absorbing radiation. The front-side illuminated infrared detector device further includes a common ground structure adjacent the detector structure, wherein the common ground structure is transmissive to radiation having a wavelength in a predetermined spectral band, and the common ground structure has a bandgap that is wider than a bandgap of the detector structure. The front-side illuminated infrared detector device further includes an optical layer adjacent the common ground structure.

Abstract: Embodiments described herein are directed to power switching circuits having a saturable inductor. In one embodiment, a power switching circuit includes a power switch assembly operable to be connected to a power source. The power switch assembly includes a plurality of parallel power switches connected to and receiving current from the power source and a saturable inductor electrically coupled in series with the plurality of parallel power switches.

Abstract: Focal plane arrays and infrared detector device having a transparent common ground structure and methods of their fabrication are disclosed. In one embodiment, a front-side illuminated infrared detector device includes a contact layer and a detector structure adjacent to the contact layer. The detector structure is capable of absorbing radiation. The front-side illuminated infrared detector device further includes a common ground structure adjacent the detector structure, wherein the common ground structure is transmissive to radiation having a wavelength in a predetermined spectral band, and the common ground structure has a bandgap that is wider than a bandgap of the detector structure. The front-side illuminated infrared detector device further includes an optical layer adjacent the common ground structure.

Abstract: Embodiments disclosed herein relate to a ROIC with a plurality of unit cells coupled to a detector array having a plurality of detectors for collecting photoelectrons over a plurality of temporal instances. An individual unit cell is electrically coupled to an individual detector to have one-to-one correspondence and includes one or more storage elements coupled to one or more programmable logic control switches. The storage element(s) store signal charges representing the photoelectrons while the programmable logic control switch(es) direct the signal charges from the storage element(s) at an individual temporal instance. A configuration of signal charges in the plurality of unit cells is mathematically operated as a three-dimensional matrix having a plurality of elements, where the three dimensions correspond to the two spatial dimensions of an individual unit cell and the individual temporal instance, and an individual element has a value corresponding to the number of signal charges stored therein.

Abstract: Embodiments described herein are directed to an energy-harvesting circuit configured to harvest energy from a power converter circuit within a switch mode power supply and generate a positive, a negative or a bipolar power supply rail to power load circuitry. The energy-harvesting circuit includes a transformer, a coupling capacitor, a diode and a capacitor. The transformer has a primary winding, a secondary winding and a magnetic core shared therebetween. The primary winding is electrically connected between a drain and a source of a transistor switch connected to the power converter circuit. The coupling capacitor is electrically connected between the drain and the primary winding and configured to provide a reset mechanism for the magnetic core. The anode of the diode is electrically connected to the secondary winding. The capacitor is electrically connected in series with the cathode of the diode and in parallel with the load circuitry.

Abstract: Embodiments described herein are directed to power switching circuits having a saturable inductor. In one embodiment, a power switching circuit includes a power switch assembly operable to be connected to a power source. The power switch assembly includes a plurality of parallel power switches connected to and receiving current from the power source and a saturable inductor electrically coupled in series with the plurality of parallel power switches.

Abstract: Embodiments disclosed herein relate to a ROIC with a plurality of unit cells coupled to a detector array having a plurality of detectors for collecting photoelectrons over a plurality of temporal instances. An individual unit cell is electrically coupled to an individual detector to have one-to-one correspondence and includes one or more storage elements coupled to one or more programmable logic control switches. The storage element(s) store signal charges representing the photoelectrons while the programmable logic control switch(es) direct the signal charges from the storage element(s) at an individual temporal instance. A configuration of signal charges in the plurality of unit cells is mathematically operated as a three-dimensional matrix having a plurality of elements, where the three dimensions correspond to the two spatial dimensions of an individual unit cell and the individual temporal instance, and an individual element has a value corresponding to the number of signal charges stored therein.

Abstract: Embodiments described herein are directed to an energy-harvesting circuit configured to harvest energy from a power converter circuit within a switch mode power supply and generate a positive, a negative or a bipolar power supply rail to power load circuitry. The energy-harvesting circuit includes a transformer, a coupling capacitor, a diode and a capacitor. The transformer has a primary winding, a secondary winding and a magnetic core shared therebetween. The primary winding is electrically connected between a drain and a source of a transistor switch connected to the power converter circuit. The coupling capacitor is electrically connected between the drain and the primary winding and configured to provide a reset mechanism for the magnetic core. The anode of the diode is electrically connected to the secondary winding. The capacitor is electrically connected in series with the cathode of the diode and in parallel with the load circuitry.