Abstract: A defibrillator is described with dual processors for verifying the performance of the defibrillator and halting the application of a defibrillation pulse to a patient if a failure of system components is detected. In accordance with one aspect of the invention, verification is performed to determine whether a transfer relay switch should be closed to permit the application of a defibrillation pulse through the transfer relay switch to a patient. In addition, in one form of the invention, an electronic switch is provided in a series discharge circuit through the patient. Verification by both processors of proper conditions for application of a defibrillation pulse is required before a determination pulse is applied through the switch. In addition, an impedance circuit is provided with a mechanism for checking the accuracy of the circuit during operation of the defibrillator.