Patents Assigned to Lam Research Corporation
  • Patent number: 6197388
    Abstract: A method for processing a substrate having an aluminum neodymium-containing layer is disclosed. The aluminum neodymium-containing layer has residual chlorine proximate to its etch surface. The method includes providing a first gas chemistry including HBr and SF6 which supplies a first plurality of fluorine ions, forming a first plasma from said first gas chemistry, passivating the etch surface of the aluminum neodymium-containing layer with the first plasma to cause a second plurality of fluorine ions to replace a first portion of the residual chlorine. This second plurality of fluorine ions is a subset of the first plurality of fluorine ions.
    Type: Grant
    Filed: March 31, 1999
    Date of Patent: March 6, 2001
    Assignee: Lam Research Corporation
    Inventors: Thomas S. Choi, John P. Holland, Nancy Tran
  • Patent number: 6194322
    Abstract: An electrode assembly for a plasma reaction chamber wherein processing of a semiconductor substrate such as a single wafer can be carried out, a method of manufacture of the electrode assembly and a method of processing a semiconductor substrate with the assembly. The electrode assembly includes a support member such as a graphite ring, an electrode such as a silicon showerhead electrode in the form of a circular disk of uniform thickness and an elastomeric joint between the support member and the electrode. The elastomeric joint allows movement between the support member and the electrode to compensate for thermal expansion as a result of temperature cycling of the electrode assembly. The elastomeric joint can include an electrically and/or thermally conductive filler and the elastomer can be a catalyst-cured polymer which is stable at high temperatures.
    Type: Grant
    Filed: July 31, 2000
    Date of Patent: February 27, 2001
    Assignee: Lam Research Corporation
    Inventors: John Lilleland, Jerome S. Hubacek, William S. Kennedy
  • Patent number: 6190927
    Abstract: An improved method for specifying and reliably detecting endpoints in processes such as plasma etching, where the signal-to-noise ratio has been severely degraded due to factors such as “cloudy window” and low ratio of reactive surface area to non-reactive surface area. The improved method of the invention samples signals produced by photo sensitive equipment, digitally filters and cross-correlates the data, normalizes the data using an average normalization value, and provides further noise reduction through the use of three modes of endpoint specification and detection. The three modes of endpoint specification and detection require a pre-specified number of consecutive samples to exhibit a certain behavior before the endpoint is deemed detected and the process terminated as a result. The three modes of endpoint specification and detection also permit a very fine control of the etch time by permitting the user to adjust the specified endpoint by gradations of the sampling period.
    Type: Grant
    Filed: October 27, 1997
    Date of Patent: February 20, 2001
    Assignee: Lam Research Corporation
    Inventor: Alexander F. Liu
  • Patent number: 6191043
    Abstract: A method of etching a silicon layer in a plasma etching reactor to form an ultra deep opening is disclosed. The method includes the steps of providing a semiconductor substrate including the silicon layer into the plasma etching reactor and flowing an etching gas that includes an oxygen reactant gas, a helium gas, and an inert bombardment-enhancing gas into the plasma etching reactor. The method further includes striking a plasma using the etchant gas chemistry, and then providing an additive gas having SF6 into the plasma etching reactor subsequent to striking the plasma. The method continues with etching an opening at least partially through the silicon layer using this plasma.
    Type: Grant
    Filed: April 20, 1999
    Date of Patent: February 20, 2001
    Assignee: Lam Research Corporation
    Inventor: Darrell McReynolds
  • Patent number: 6187684
    Abstract: A method for post plasma etch cleaning a semiconductor wafer is provided. The semiconductor wafer has a plurality of layers formed thereon, and one of the plurality of layers is an oxide layer that has an overlying photoresist mask. The method includes plasma etching a via feature in the oxide layer. The plasma etching is configured to generate a polymer film on sidewalls of the via feature. An ashing operation is then performed to remove the photoresist mask. The method then moves to brush scrubbing the oxide layer and the via feature defined in the oxide layer with first chemicals in a first brush station. Brush scrubbing the oxide layer and the via feature follows with DI water in the first brush station. Then, the oxide layer and the via feature are brush scrubbed with second chemicals in a second brush station. In the same second brush station, the oxide layer and the via feature are scrubbed with DI water.
    Type: Grant
    Filed: December 9, 1999
    Date of Patent: February 13, 2001
    Assignee: Lam Research Corporation
    Inventors: Jeffrey J. Farber, Allan M. Radman, Helmuth W. Treichel
  • Patent number: 6188564
    Abstract: A method and apparatus for compensating non-uniform wafer processing in a plasma processing chamber. The plasma processing chamber has an electrostatic chuck for clamping a wafer. The electrostatic chuck has one or more layers. A first wafer is processed on an electrostatic chuck in a first plasma processing chamber by exposing the first wafer to a plasma. Then, non-uniformity characteristics of the processed first wafer are determined. Based on the non-uniformity characteristics, one or more layers of the electrostatic chuck are configured to substantially compensate for the non-uniformity characteristics. A second wafer is then processed on the configured electrostatic chuck to produce substantially uniform process results.
    Type: Grant
    Filed: March 31, 1999
    Date of Patent: February 13, 2001
    Assignee: Lam Research Corporation
    Inventor: Fangli J. Hao
  • Patent number: 6186865
    Abstract: A technique for utilizing a sensor to monitor fluid pressure from a fluid bearing located under a polishing pad to detect a polishing end point. A sensor is located at the leading edge of a fluid bearing of a linear polisher, which is utilized to perform chemical-mechanical polishing on a semiconductor wafer. The sensor monitors the fluid pressure to detect a change in the fluid pressure during polishing, which change corresponds to a change in the shear force when the polishing transitions from one material layer to the next.
    Type: Grant
    Filed: October 29, 1998
    Date of Patent: February 13, 2001
    Assignee: Lam Research Corporation
    Inventors: Brian Thornton, Andrew J. Nagengast, Robert G. Boehm, Jr., Anil K. Pant, Wilbur C. Krusell
  • Patent number: 6184158
    Abstract: A method of depositing a dielectric film on a substrate in a process chamber of an inductively coupled plasma-enhanced chemical vapor deposition reactor. Gap filling between electrically conductive lines on a semiconductor substrate and depositing a cap layer are achieved. Films having significantly improved physical characteristics including reduced film stress are produced by heating the substrate holder on which the substrate is positioned in the process chamber.
    Type: Grant
    Filed: December 23, 1996
    Date of Patent: February 6, 2001
    Assignee: Lam Research Corporation
    Inventors: Paul Kevin Shufflebotham, Brian McMillin, Alex Demos, Huong Nguyen, Butch Berney, Monique Ben-Dor
  • Patent number: 6184488
    Abstract: A low inductance large area coil (LILAC) is provided as a source for generating a large area plasma. The LILAC comprises at least two windings which, when connected to an RF source via impedance matching circuitry, produce a circulating flow of electrons to cause a magnetic field in the plasma. Because the LILAC employs multiple windings, few turns of winding are required to obtain a large area coil, so that the inductance of the LILAC is low. The low inductance of the LILAC ensures that the self-resonating frequency of the LILAC is kept at a level far above the RF driving frequency, allowing a broad frequency range for impedance matching. Thus, there is no difficulty in impedance matching, and power transfer can be maximized, permitting efficient generation of a large area plasma.
    Type: Grant
    Filed: April 22, 1998
    Date of Patent: February 6, 2001
    Assignee: Lam Research Corporation
    Inventor: Duane Charles Gates
  • Patent number: 6178919
    Abstract: The invention relates to a plasma processing reactor apparatus for semiconductor processing a substrate. The apparatus includes a chamber. The apparatus further includes a top electrode configured to be coupled to a first RF power source having a first RF frequency and a bottom electrode configured to be coupled to second RF power source having a second RF frequency that is lower than the first RF frequency. The apparatus additionally includes an insulating shroud that lines an interior of the chamber, the insulating shroud being configured to be electrically floating during the processing. The apparatus further includes a perforated plasma confinement ring disposed outside of an outer periphery of the bottom electrode, a top surface of the perforated plasma confinement ring being disposed below a top surface of the substrate and electrically grounded during the processing.
    Type: Grant
    Filed: December 28, 1998
    Date of Patent: January 30, 2001
    Assignee: Lam Research Corporation
    Inventors: Lumin Li, George Mueller
  • Patent number: 6174450
    Abstract: A plasma processing system includes a plasma reactor, a first power circuit, a second power circuit and a feedback circuit. The first power circuit supplies a first radio frequency (rf) energy to the plasma reactor that is suitable for creating a direct current bias on a workpiece positioned within a plasma chamber. The second power circuit supplies a second rf energy to the plasma reactor that is suitable for striking a plasma within the plasma chamber. The feedback circuit is coupled to control the first power circuit by detecting at least one parameter associated with the first rf energy and providing a feedback control signal to the first power circuit. The first power circuit adjusts the first rf energy so that a level of energy of the ionized particles within the plasma chamber is substantially controlled via the direct current bias created by the first rf energy.
    Type: Grant
    Filed: April 16, 1997
    Date of Patent: January 16, 2001
    Assignee: Lam Research Corporation
    Inventors: Roger Patrick, Norman Williams
  • Patent number: 6170110
    Abstract: The present invention describes a method and apparatus used in a substrate cleaning system wherein a substrate is placed into a first brush station while a chemical solution is delivered to the first brush station at a desired concentration level. The substrate is then scrubbed in the first brush station. After the substrate is scrubbed in the first brush station the substrate is transferred to a second brush station. The chemical solution used in the first brush station is then delivered to a brush in the second brush station in a ramp up manner in order to clean the brush in the second brush station. The delivery of the chemical solution to the second brush station is then stopped and deionized water is delivered to the second brush station. The substrate is then scrubbed using the deionized water in order to rinse the chemical solution from the substrate prior to transferring the substrate from the second brush station to another processing station.
    Type: Grant
    Filed: July 6, 2000
    Date of Patent: January 9, 2001
    Assignee: Lam Research Corporation
    Inventors: Julia Svirchevski, Katrina Mikhaylich, Jackie Zhang
  • Patent number: 6170429
    Abstract: A chamber liner for use in a semiconductor process chamber and a semiconductor process chamber containing the chamber liner are disclosed. The process chamber includes a housing having an inner surface defining a chamber in which a vacuum is drawn during processing of a semiconductor wafer. The chamber liner has a plasma confinement shield with a plurality of apertures. An outer sidewall extends upwardly from the plasma confinement shield. An outer flange extends outwardly from the outer sidewall such that the outer flange extends beyond the chamber and into a space at atmospheric pressure. The chamber liner preferably further includes an inner sidewall that extends upwardly from the plasma confinement shield. The plasma confinement shield, the inner and outer sidewalls, and the outer flange are preferably integral with one another.
    Type: Grant
    Filed: September 30, 1998
    Date of Patent: January 9, 2001
    Assignee: Lam Research Corporation
    Inventors: Alan M. Schoepp, William M. Denty, Jr., Michael Barnes
  • Patent number: 6168690
    Abstract: The invention relates to an improved sputter target that is a combination sputter target and induction antenna. In one embodiment, when the sputter target is energized sputter material particles are sputtered away from the sputter target and a plasma is induced. In another embodiment, the sputter target is energized by an energy source. In yet another embodiment, the energy source includes a bias power supply and an induction power supply. The bias power supply applies a potential to the sputter target relative to an object. The induction power supply applies a current to the sputter target. The potential and the current promote the sputtering away of the sputter target, the formation of the plasma and the anisotropic distribution of the sputtered material particles.
    Type: Grant
    Filed: September 29, 1997
    Date of Patent: January 2, 2001
    Assignee: Lam Research Corporation
    Inventors: Russell F. Jewett, Neil M. Benjamin, Andrew J. Perry, Vahid Vahedi
  • Patent number: 6164241
    Abstract: A radio frequency plasma multiple-coil antenna allows for controllable, uniform inductive coupling within a plasma reactor. According to exemplary embodiments, multiple coils are positioned on a dielectric window of a plasma chamber, and are powered by a single radio frequency generator and tuned by a single matching network. Each coil is either planar or a combination of a planar coil and a vertically stacked helical coil. The input end of each coil is connected to an input tuning capacitor and the output end is terminated to the ground through an output tuning capacitor. The location of the maximum inductive coupling of the radio frequency to the plasma is mainly determined by the output capacitor, while the input capacitor is mainly used to adjust current magnitude into each coil.
    Type: Grant
    Filed: June 30, 1998
    Date of Patent: December 26, 2000
    Assignee: Lam Research Corporation
    Inventors: Jian J. Chen, Robert G. Veltrop, Thomas E. Wicker
  • Patent number: 6165956
    Abstract: A cleaning solution, method, and apparatus for cleaning semiconductor substrates after chemical mechanical polishing of copper films is described. The present invention includes a cleaning solution which combines deionized water, an organic compound, and a fluoride compound in an acidic pH environment for cleaning the surface of a semiconductor substrate after polishing a copper layer. Such methods of cleaning semiconductor substrates after copper CMP alleviate the problems associated with brush loading and surface and subsurface contamination.
    Type: Grant
    Filed: October 21, 1997
    Date of Patent: December 26, 2000
    Assignee: Lam Research Corporation
    Inventors: Liming Zhang, Yuexing Zhao, Diane J. Hymes, Wilbur C. Krusell
  • Patent number: 6165910
    Abstract: In a plasma processing chamber, a method for etching through a selected portion of an oxide layer of a wafer's layer stack to create a self-aligned contact opening is described. The wafer stack includes a substrate, a polysilicon layer disposed above the substrate, a nitride layer disposed above said polysilicon layer and the oxide layer disposed above the nitride layer. The method for etching includes etching through the oxide layer of the layer stack with a chemistry and a set of process parameters. The chemistry essentially includes C.sub.2 HF.sub.5 and CH.sub.2 F.sub.2 and the set of process parameters facilitate etching through the oxide layer without creating a spiked etch and etching the oxide layer through to the substrate without substantially damaging the nitride layer.
    Type: Grant
    Filed: December 29, 1997
    Date of Patent: December 26, 2000
    Assignee: Lam Research Corporation
    Inventors: Janet M. Flanner, Linda N. Marquez, Joel M. Cook, Ian J. Morey
  • Patent number: 6162301
    Abstract: A cleaning solution, method, and apparatus for cleaning semiconductor substrates after chemical mechanical polishing of copper films is described. The present invention includes a cleaning solution which combines deionized water, an organic compound, and a fluoride compound in an acidic pH environment for cleaning the surface of a semiconductor substrate after polishing a copper layer. Such methods of cleaning semiconductor substrates after copper CMP alleviate the problems associated with brush loading and surface and subsurface contamination.
    Type: Grant
    Filed: January 7, 1999
    Date of Patent: December 19, 2000
    Assignee: Lam Research Corporation
    Inventors: Liming Zhang, Yuexing Zhao, Diane J. Hymes, Wilbur C. Krusell
  • Patent number: 6160621
    Abstract: An interferometric method and apparatus for in-situ monitoring of a thin film thickness and of etch and deposition rates using a pulsed flash lamp providing a high instantaneous power pulse and having a wide spectral width. The optical path between the flash lamp and a spectrograph used for detecting light reflected from a wafer is substantially transmissive to the ultraviolet range of the spectrum making available to the software algorithms operable to calculate film thickness and etch and deposition rates desirable wavelengths.
    Type: Grant
    Filed: September 30, 1999
    Date of Patent: December 12, 2000
    Assignee: Lam Research Corporation
    Inventors: Andrew Perry, Randall Mundt
  • Patent number: 6155203
    Abstract: A method and apparatus for controlling deposit build-up on an interior surface of a dielectric member of a plasma processing chamber. The deposit build-up is controlled by selective ion bombardment of the inner surface by shifting location of a peak voltage amplitude of a voltage standing wave on an antenna such as a flat spiral coil of the plasma processing chamber. A region of high ion bombardment on the interior surface of the dielectric member is displaced by controlling the value of a termination capacitance over a range of values causing regions of low and high ion bombardment to move over the dielectric member in order to effect cleaning thereof.
    Type: Grant
    Filed: December 1, 1999
    Date of Patent: December 5, 2000
    Assignee: Lam Research Corporation
    Inventors: William S. Kennedy, Albert J. Lamm, Thomas E. Wicker, Robert A. Maraschin