Abstract: An all-in-one trench-over-via etch wherein etching of a low-k material beneath a metal hard mask of titanium nitride containing material is carried out in alternating steps of (a) etching the low-k material while maintaining chuck temperature at about 45 to 80° C. and (b) metal hard mask rounding and Ti-based residues removal while maintaining chuck temperature at about 90 to 130° C.

Abstract: A method for etching an ultra high aspect ratio feature in a dielectric layer through a carbon based mask is provided. The dielectric layer is selectively etched with respect to the carbon based mask, wherein the selective etching provides a net deposition of a fluorocarbon based polymer on the carbon based mask. The selective etch is stopped. The fluorocarbon polymer is selectively removed with respect to the carbon based mask, so that the carbon based mask remains, using a trimming. The selectively removing the fluorocarbon polymer is stopped. The dielectric layer is again selectively etched with respect to the carbon based mask, wherein the second selectively etching provides a net deposition of a fluorocarbon based polymer on the carbon based mask.

Abstract: A continuously variable microwave circuit capable of being tuned to operate under a plurality of distinct operating conditions, comprising: a waveguide comprising an adjustable tuning element having a core configured to protrude into the waveguide; an actuator in operative communication with the adjustable tuning element, wherein the actuator is operable to selectively vary a length of the core that is protruding into the waveguide so as to minimize reflected microwave power in the plasma asher; and a controller in operative communication with the actuator, wherein the controller is configured to selectively activate the actuator upon a change in the plurality of operating conditions.

Abstract: A method etching features through a stack of a silicon nitride layer over a silicon layer over a silicon oxide layer in a plasma processing chamber is provided. The silicon nitride layer is etched in the plasma processing chamber, comprising; flowing a silicon nitride etch gas; forming the silicon nitride etch gas into a plasma to etch the silicon nitride layer, and stopping the flow of the silicon nitride etch gas. The silicon layer is, comprising flowing a silicon etch gas, wherein the silicon etch gas comprises SF6 or SiF4, forming the silicon etch gas into a, and stopping the flow of the silicon etch gas. The silicon oxide layer is etched in the plasma processing chamber, comprising flowing a silicon oxide etch gas, forming the silicon oxide etch gas into a plasma, and stopping the flow of the silicon oxide etch gas.

Abstract: A method and apparatus for compensating a bias voltage at the wafer by measuring RF voltage signals in RF driven plasma including at least an electrostatic, chuck (ESC), a capacitive divider, a signal processing and signal conditioning network is disclosed. The bias compensation device includes a capacitive divider to detect the RF voltage at the ESC, a signal conditioning network for the purpose of filtering specific RF signals of interests, and a signal processing unit for computing the DC wafer potential from the filtered RF signals.

Abstract: Methods for stabilizing a ceramic contact surface of an electrostatic chuck, wherein the electrostatic chuck can be disposed within a reaction chamber of a semiconductor wafer processing assembly including a radio frequency source and a coolant gas supply are described herein. The method may include: clamping electrostatically a conditioning wafer to the ceramic contact surface of the electrostatic chuck; and cycling an output power of the radio frequency source and an output pressure of the coolant gas supply for multiple hot/cold cycles. Each of the hot/cold cycles includes a hot abrasion state and a cold abrasion state. At the hot abrasion state, the output power of the radio frequency source is relatively high and the output pressure of the coolant gas supply is relatively low to yield a relatively hot conditioning wafer.

Abstract: Plasma processing chamber having a bottom electrode assembly is disclosed. The assembly has an inner bottom electrode for supporting a substrate and an outer bottom electrode disposed outside of the inner bottom electrode. The outer bottom electrode defines a region for chamber cleaning, and the outer bottom electrode includes a conductive ring and an inductive coil placed under the conductive ring. Further included is a dielectric material disposed between the inner bottom electrode and the outer bottom electrode, and the dielectric material separates the inner bottom electrode from the outer bottom electrode. A switch is provided for connecting radio frequency (RF) power to either the inner bottom electrode or the outer bottom electrode. The chamber also includes a top electrode assembly with a top electrode. The top electrode is disposed above both the inner and outer bottom electrodes.

Abstract: A temperature controlled substrate support assembly used for processing a substrate in a vacuum chamber of a semiconductor processing apparatus. The substrate support assembly comprises a top plate for supporting the substrate. A base plate is disposed below the top plate wherein the base plate comprises a cavity in an upper surface of the base plate. A cover plate is disposed between the top plate and the base plate. At least one thermoelectric module is in the cavity in the upper surface of the base plate wherein the at least one thermoelectric module is in thermal contact with the top plate and the base plate, and the at least one thermoelectric module is maintained at atmospheric pressure.

Abstract: A semiconductor substrate processing system includes a substrate support defined to support a substrate in exposure to a processing region. The system also includes a first plasma chamber defined to generate a first plasma and supply reactive constituents of the first plasma to the processing region. The system also includes a second plasma chamber defined to generate a second plasma and supply reactive constituents of the second plasma to the processing region. The first and second plasma chambers are defined to be independently controlled.

Abstract: A method for etching a layer is provided. A substrate is provided in a chamber. An etch plasma for etching a layer on the substrate is generated. Light from a first region of the chamber is measured to provide a first signal. Light from a second region of the chamber is measured to provide a second signal. The first signal with the second signal are compared to determine an etch endpoint.

Abstract: An arrangement for performing pressure control within a processing chamber substrate processing is provided. The arrangement includes a peripheral ring configured at least for surrounding a confined chamber volume that is configured for sustaining a plasma for etching the substrate during substrate processing. The peripheral ring includes a plurality of slots that is configured at least for exhausting processed byproduct gas from the confined chamber volume during substrate processing. The arrangement also includes a conductive control ring that is positioned next to the peripheral ring and is configured to include plurality of slots. The pressure control is achieved by moving the conductive control ring relative to the peripheral ring such that a first slot on the peripheral ring and a second slot on the conductive control ring are offset with respect to one another in a range of zero offset to full offset.

Abstract: An apparatus for delamination drying a substrate is provided. A chamber for receiving a substrate is provided. A chuck supports and clamps the substrate within the chamber. A temperature controller controls the temperature of the substrate and is able to cool the substrate. A vacuum pump is in fluid connection with the chamber. A tilting mechanism is able to tilt the chuck at least 90 degrees.

Abstract: A plasma processing system with improved component temperature control is disclosed. The system may include a plasma processing chamber having a chamber wall. The system may also include an electrode disposed inside the plasma processing chamber. The system may also include a support member disposed inside the plasma processing chamber for supporting the electrode. The system may also include a support plate disposed outside the chamber wall. The system may also include a cantilever disposed through the chamber wall for coupling the support member with the support plate. The system may also include a lift plate disposed between the chamber wall and the support plate. The system may also include thermally resistive coupling mechanisms for mechanically coupling the lift plate with the support plate.

Abstract: A method of producing plurality of etched features in an electronic device is disclosed that avoids micro-loading problems thus maintaining more uniform sidewall profiles and more uniform critical dimensions. The method comprises performing a first time-divisional plasma etch process step within a plasma chamber to a first depth of the plurality of etched features, and performing a flash process step to remove any polymers from exposed surfaces of the plurality of etched features without requiring an oxidation step. The flash process step is performed independently of the time-divisional plasma etch step. A second time-divisional plasma etch process step is performed within the plasma chamber to a second depth of the plurality of etched features. The method may be repeated until a desired etch depth is reached.

Abstract: A device for processing wafer-shaped articles, comprises a chuck adapted to receive a wafer shaped article, and a collector surrounding the chuck. The collector comprises a base and a plurality of divider walls, as well as a plurality of nested partitions surrounding the chuck. Each of the plurality of nested partitions is positioned on a corresponding one of the plurality of divider walls, and each of the plurality of nested partitions is vertically movable so as to define a plurality of separate process regions within the collector depending on the vertical position of each of the plurality of nested partitions. At least one of the divider walls comprises an internal exhaust conduit communicating with an exhaust duct underlying the divider wall.

Abstract: A proximity head defined by a body having a length. The body includes a main bore defined therein and extending along the length. A resistor bore is defined in the body and extends along the length. The resistor bore defined below the main bore. A first plurality of bores defined between the main bore and the resistor bore and a second plurality of bores defined between the resistor bore and an exterior surface of the body. The exterior surface of the body defining a proximity surface of the proximity head.

Abstract: Methods and systems for detecting a change in the state of plasma confinement within a capacitively coupled RF driven plasma processing chamber are disclosed. In one or more embodiments, the plasma unconfinement detection methods employ an analog or digital circuit that can actively poll the RF voltage at the powered electrode in the form of an Electrostatic Chuck (ESC) as well as the open loop response of the power supply (PSU) responsible for chucking a wafer to ESC. The circuit provides a means detecting both a change in RF voltage delivered to the ESC as well as a change in the open loop response of the PSU. By simultaneously monitoring these electrical signals, the disclosed algorithm can detect when plasma changes from a confined to an unconfined state.

Abstract: A substrate is moved below a substrate cleaning module in a direction extending from a leading edge to a trailing edge of the substrate cleaning module. A cleaning material is dispensed downward toward a top surface of the substrate along the leading edge of the substrate cleaning module. A rinsing material is dispensed downward toward the top surface of the substrate along the trailing edge of the substrate cleaning module to generate a rinsing meniscus. Vacuum suction is applied at a vacuum suction location along a bottom surface of the substrate cleaning module and parallel to the leading and trailing edges of the substrate cleaning module. The vacuum location is positioned between a dispense location of the cleaning material and a dispense location of the rinsing material. A plenum region located between the dispense location of the cleaning material and the vacuum location is vented.

Abstract: A semiconductor substrate processing system includes a chamber that includes a processing region and a substrate support. The system includes a top plate assembly disposed within the chamber above the substrate support. The top plate assembly includes first and second sets of plasma microchambers each formed into the lower surface of the top plate assembly. A first network of gas supply channels are formed through the top plate assembly to flow a first process gas to the first set of plasma microchambers to be transformed into a first plasma. A set of exhaust channels are formed through the top plate assembly. The second set of plasma microchambers are formed inside the set of exhaust channels. A second network of gas supply channels are formed through the top plate assembly to flow a second process gas to the second set of plasma microchambers to be transformed into a second plasma.

Abstract: A segmented transformer coupled plasma (TCP) coil is provided as a source for generating a uniform plasma in a plasma reactor. The segmented TCP is divided into two or more segment coils which, when connected to an RF source, produces a circulating flow of electrons to cause a magnetic field in the plasma. Because the segmented TCP employs multiple segment coils, a plasma is generated that is more spatially uniform than the plasma produced by a monolithic coil. This is implemented using a power distributing component that allows the RF current to be distributed in the segment coils such that a uniform plasma density can be obtained in an area spanned by the coils. For instance, variable shunts, switchable shunts, and disconnect switches can be used to vary the RF currents in the individual coils.