Patents Assigned to Lam Research
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Patent number: 10957520Abstract: A connection terminal for a heating element of a substrate support in a substrate processing system include a contact plate configured to be electrically connected to a contact pad of the heating element within a ceramic layer of the substrate support. A wire connection portion extends from the contact plate and is configured to receive and retain a wire arranged to provide electrical power to the heating element. At least one of the contact plate and the wire connection portion comprises a first material having a first coefficient of thermal expansion (CTE) that is within 20% of a second CTE of the ceramic layer.Type: GrantFiled: September 20, 2018Date of Patent: March 23, 2021Assignee: Lam Research CorporationInventor: Siyuan Tian
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Patent number: 10950454Abstract: A method for etching a substrate includes performing, in a plasma chamber, a first etch of a substrate material using a plasma etch process. The first etch forms features to a first depth in the material. Following the first etch, the method includes performing, in the plasma chamber without removing the substrate from the chamber, an atomic layer passivation (ALP) process to deposit a conformal film of passivation over the mask and the features formed during the first etch. The ALP process uses a vapor from a liquid precursor to form passivation over the features and the mask. The method further includes performing, in the plasma chamber, a second etch of the material using the plasma etch process. The conformal film of passivation is configured to protect the mask and sidewalls of the features during the second etch. A plasma processing system also is described.Type: GrantFiled: August 4, 2017Date of Patent: March 16, 2021Assignee: Lam Research CorporationInventors: Xiang Zhou, Tom A. Kamp, Yoshie Kimura, Duming Zhang, Chen Xu, John Drewery, Alex Paterson
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Patent number: 10950421Abstract: Systems and methods for identifying a location of a fault in an RF transmission system includes characterizing the RF transmission system and selecting one of the stage in the RF transmission system as an initial selected stage. An output of the initial selected stage can be measured in the characterized RF transmission system. The measured output of the initial selected stage is propagated through a baseline RF model and a point of deflection is identified in a resulting RF model of the RF transmission system.Type: GrantFiled: April 21, 2014Date of Patent: March 16, 2021Assignee: Lam Research CorporationInventor: John C. Valcore, Jr.
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Patent number: 10941489Abstract: A deposition apparatus for processing substrates includes a vacuum chamber including a processing zone in which a substrate may be processed. A showerhead assembly includes a stem, face plate and back plate wherein the stem is rotary friction welded to the back plate. A substrate pedestal assembly is configured to support a substrate on an upper surface thereof when a substrate is processed in the deposition apparatus.Type: GrantFiled: March 18, 2019Date of Patent: March 9, 2021Assignee: Lam Research CorporationInventors: Eric Madsen, Kurt Kern
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Patent number: 10943789Abstract: A substrate is disposed on a substrate holder within a process module. The substrate includes a mask material overlying a target material with at least one portion of the target material exposed through an opening in the mask material. A plasma is generated in exposure to the substrate. For a first duration, a bias voltage is applied at the substrate holder at a first bias voltage setting corresponding to a high bias voltage level. For a second duration, after completion of the first duration, a bias voltage is applied at the substrate holder at a second bias voltage setting corresponding to a low bias voltage level. The second bias voltage setting is greater than 0 V. The first and second durations are repeated in an alternating and successive manner for an overall period of time necessary to remove a required amount of the target material exposed on the substrate.Type: GrantFiled: November 21, 2017Date of Patent: March 9, 2021Assignee: Lam Research CorporationInventors: Zhongkui Tan, Qian Fu, Ying Wu, Qing Xu, John Drewery
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Patent number: 10944374Abstract: An apparatus and method electrically coupling an electrostatic chuck RF filter box with a pedestal lift. The RF filter box has a contact block and at least one alignment feature on an outer mating surface of the RF filter block. The contact block includes self-aligning electrical connectors and the alignment feature is configured for aligning self-aligning electrical connectors with corresponding electrical connectors on the bracket of the pedestal lift such that the self-aligning electrical connectors and the corresponding electrical connectors on the bracket of the pedestal lift automatically mate when the contact block is mounted to the bracket of the pedestal lift.Type: GrantFiled: June 19, 2020Date of Patent: March 9, 2021Assignee: Lam Research CorporationInventors: Miguel Benjamin Vasquez, Jeremy Jerome Pool, Damien Martin Slevin
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Patent number: 10943769Abstract: Apparatus and methods for distributing and mixing gas are provided. In one example, a gas distributor comprises a body, a gas inlet for admitting gas to the body, an orbital array of gas outlets for distributing the gas to an external component, and a central gas distribution point disposed within the body at a center of the orbital array of gas outlets and in fluid communication with the orbital array of gas outlets.Type: GrantFiled: July 19, 2018Date of Patent: March 9, 2021Assignee: Lam Research CorporationInventors: Mark Taskar, Iqbal A. Shareef
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Patent number: 10937634Abstract: A bevel etcher for cleaning a bevel edge of a semiconductor substrate with plasma includes a lower electrode assembly having a lower support having a cylindrical top portion. An upper dielectric component is disposed above the lower electrode assembly having a cylindrical bottom portion opposing the top portion of the lower support. A tunable upper plasma exclusion zone (PEZ) ring surrounds the bottom portion of the dielectric component, wherein a lower surface of the tunable upper PEZ ring includes an upwardly tapered outer portion extending outwardly from the bottom portion of the upper dielectric component, wherein a vertical height of an adjustable gap between the lower surface of the upper PEZ ring and an upper surface of a substrate supported on the lower support can be increased or decreased such that the extent of the bevel edge of the substrate to be cleaned by the plasma can respectively be adjusted radially inward or radially outward.Type: GrantFiled: October 4, 2013Date of Patent: March 2, 2021Assignee: LAM RESEARCH CORPORATIONInventors: Jack Chen, Adam Liron, Gregory Sexton
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Patent number: 10927475Abstract: Methods and electroplating systems for controlling plating electrolyte concentration on an electrochemical plating apparatus for substrates are disclosed. A method involves: (a) providing an electroplating solution to an electroplating system; (b) electroplating the metal onto the substrate while the substrate is held in a cathode chamber of an electroplating cell of electroplating system; (c) supplying the make-up solution to the electroplating system via a make-up solution inlet; and (d) supplying the secondary electroplating solution to the electroplating system via a secondary electroplating solution inlet. The secondary electroplating solution includes some or all components of the electroplating solution. At least one component of the secondary electroplating solution has a concentration that significantly deviates from its target concentration.Type: GrantFiled: November 1, 2018Date of Patent: February 23, 2021Assignee: Lam Research CorporationInventors: Zhian He, Shantinath Ghongadi, Quan Ma, Hyungjun Hur, Cian Sweeney, Quang Nguyen, Rezaul Karim, Jingbin Feng
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Patent number: 10930478Abstract: An apparatus for processing a substrate is provided. A processing chamber is provided. A substrate support is within the processing chamber. A gas inlet provides a process gas into the processing chamber. A gas source provides the process gas to the gas inlet. An exhaust pump pumps gas from the processing chamber. A parameter measurement system comprises a cavity ring down device in fluid communication with the processing chamber, comprising a first cavity ring down mirror on a first side of the cavity ring down device and a second cavity ring down mirror on a second side of the cavity ring down device spaced apart from the first cavity ring down mirror. At least one laser light source is optically coupled to the first cavity ring down mirror. A light detector is optically coupled to either the first cavity ring down mirror or the second cavity ring down mirror.Type: GrantFiled: May 24, 2018Date of Patent: February 23, 2021Assignee: Lam Research CorporationInventors: Jagadeeshwari Manne, Yassine Kabouzi, Luc Albarede
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Patent number: 10930511Abstract: In one example, an electroplating system comprises a first bath reservoir, a second bath reservoir, a clamp, a first anode in the first bath reservoir, a second anode in the second bath reservoir, and a direct current power supply. The first bath reservoir contains a first electrolyte solution that includes an alkaline copper-complexed solution. The second bath reservoir contains a second electrolyte solution that includes an acidic copper plating solution. The direct current power supply generates a first direct current between the clamp and the first anode to electroplate a first copper layer on the cobalt layer of the wafer submerged in the first electrolyte solution. The direct current power supply then generates a second direct current between the clamp and the second anode to electroplate a second copper layer on the first copper layer of the wafer submerged in the second electrolyte solution.Type: GrantFiled: March 30, 2018Date of Patent: February 23, 2021Assignee: Lam Research CorporationInventors: Jeyavel Velmurugan, Bryan Buckalew, Thomas Ponnuswamy
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Publication number: 20210047732Abstract: An electrical connector includes first, second, third, and fourth electrical conductors. The first, second, third, and fourth electrical conductors each include a first end to be electrically connected to a respective electrically conductive pad formed on a surface of a ceramic layer of a substrate support and a second end to be electrically connected to a respective wire within a through hole in the substrate support. The electrical connector also includes a retainer to hold the first, second, third, and fourth electrical conductors in place.Type: ApplicationFiled: November 3, 2020Publication date: February 18, 2021Applicant: Lam Research CorporationInventors: Siyuan TIAN, Donald J. MILLER
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Patent number: 10923322Abstract: A coil portion is formed. A first articulation portion extends from the coil portion. A first mounting structure extends from the first articulation portion. The first mounting structure includes a first mounting region configured to mount in contact with a terminal of a first electrical component. The first articulation portion and the first mounting structure are configured to position the first mounting region at a location outside of a strong electromagnetic field emanating from the coil portion. A second articulation portion extends from the coil portion. A second mounting structure extends from the second articulation portion. The second mounting structure includes a second mounting region configured to mount in contact with a terminal of a second electrical component. The second articulation portion and the second mounting structure are configured to position the second mounting region at a location outside of the strong electromagnetic field emanating from the coil portion.Type: GrantFiled: June 14, 2017Date of Patent: February 16, 2021Assignee: Lam Research CorporationInventors: Oscar Lopez, Shen Peng, David Setton, Craig Rosslee, Dan Marohl, Andras Kuthi
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Patent number: 10923385Abstract: A carrier plate for receiving a wafer includes a pocket defined in a middle section on a top surface of the carrier plate and has a surface diameter. The pocket defines a substrate support region. A retaining feature of the carrier plate is defined at an outer edge of the pocket. A tapered portion of the carrier plate extends from the retaining feature to an outer diameter. The tapered portion is configured to receive a focus ring. A bottom surface of the carrier plate is configured to sit over a pedestal that is used in a process chamber. A plurality of wafer supports is disposed on a top surface of the substrate support region to support the wafer, when received.Type: GrantFiled: November 3, 2016Date of Patent: February 16, 2021Assignee: Lam Research CorporationInventor: Karl Leeser
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Patent number: 10923340Abstract: An apparatus for electroplating metal on a semiconductor substrate with improved plating uniformity includes in one aspect: a plating chamber configured to contain an electrolyte and an anode; a substrate holder configured to hold the semiconductor substrate; and an ionically resistive ionically permeable element comprising a substantially planar substrate-facing surface and an opposing surface, wherein the element allows for flow of ionic current towards the substrate during electroplating, and wherein the element comprises a region having varied local resistivity. In one example the resistivity of the element is varied by varying the thickness of the element. In some embodiments the thickness of the element is gradually reduced in a radial direction from the edge of the element to the center of the element. The provided apparatus and methods are particularly useful for electroplating metal in WLP recessed features.Type: GrantFiled: June 1, 2018Date of Patent: February 16, 2021Assignee: Lam Research CorporationInventors: Burhanuddin Kagajwala, Bryan L. Buckalew, Lee Peng Chua, Aaron Berke, Robert Rash, Steven T. Mayer
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Patent number: 10923379Abstract: An insulator-type substrate is positioned on a support surface of a substrate support structure in exposure to a plasma. An initial clamping voltage is applied to an electrode within the substrate support structure to rapidly accumulate electrical charge on the support surface to hold the substrate. A backside cooling gas is flowed to a region between the substrate and the support surface, and a leak rate of the backside cooling gas is monitored. A steady clamping voltage is applied to the electrode, and the steady clamping voltage is adjusted in a step-wise manner to maintain the monitored leak rate of the backside cooling gas at just less than a maximum allowable leak rate. Or, a pulsed clamping voltage is applied to the electrode, and the pulsed clamping voltage is adjusted to maintain the monitored leak rate of the backside cooling gas at just less than the maximum allowable leak rate.Type: GrantFiled: February 15, 2017Date of Patent: February 16, 2021Assignee: Lam Research CorporationInventors: Chin-Yi Liu, Daniel Lai, Rajitha Vemuri, Padma Gopalakrishnan
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Patent number: 10923380Abstract: An edge ring for use in a plasma processing chamber with a chuck is provided. An edge ring body has a first surface to be placed over and facing the chuck, wherein the first surface forms a ring around an aperture. A first elastomer ring is integrated to the first surface and extending around the aperture.Type: GrantFiled: February 12, 2018Date of Patent: February 16, 2021Assignee: Lam Research CorporationInventors: Christopher Kimball, Keith Gaff, Feng Wang
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Patent number: 10916409Abstract: Systems and methods for active control of radial etch uniformity are described. One of the methods includes generating a radio frequency (RF) signal having a fundamental frequency and generating another RF signal having a harmonic frequency. The harmonic frequency, or a phase, or a parameter level, or a combination thereof of the other RF signal are controlled to control harmonics of RF plasma sheath within a plasma chamber to achieve radial etch uniformity.Type: GrantFiled: June 18, 2018Date of Patent: February 9, 2021Assignee: Lam Research CorporationInventors: Alexei Marakhtanov, Felix Leib Kozakevich, John Holland, Bing Ji, Kenneth Lucchesi
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Patent number: 10914003Abstract: A gas delivery substrate for mounting gas supply components of a gas delivery system for a semiconductor processing apparatus is provided. The substrate may include a plurality of layers having major surfaces thereof bonded together forming a laminate with openings for receiving and mounting first, second, third and fourth gas supply components on an outer major surface. The substrate may include a first gas channel extending across an interior major surface that at least partially overlaps a second gas channel extending across a different interior major surface. The substrate may include a first gas conduit including the first gas channel connecting the first gas supply component to the second gas supply component, and a second gas conduit including the second channel connecting the third gas supply component to the fourth gas supply component. Also disclosed are various techniques for manufacturing gas delivery substrates.Type: GrantFiled: December 23, 2019Date of Patent: February 9, 2021Assignee: Lam Research CorporationInventors: Andrew C. Lee, Michael C. Kellogg, Christopher J. Pena, John Edward Daugherty
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Patent number: 10916434Abstract: Described herein are methods of filling features with tungsten, and related systems and apparatus, involving inhibition of tungsten nucleation. In some embodiments, the methods involve selective inhibition along a feature profile. Methods of selectively inhibiting tungsten nucleation can include exposing the feature to a direct or remote plasma. The methods include performing multi-stage inhibition treatments including intervals between stages. One or more of plasma source power, substrate bias power, or treatment gas flow may be reduced or turned off during an interval. The methods described herein can be used to fill vertical features, such as in tungsten vias, and horizontal features, such as vertical NAND (VNAND) wordlines. The methods may be used for both conformal fill and bottom-up/inside-out fill. Examples of applications include logic and memory contact fill, DRAM buried wordline fill, vertically integrated memory gate and wordline fill, and 3-D integration using through-silicon vias.Type: GrantFiled: February 10, 2020Date of Patent: February 9, 2021Assignee: Lam Research CorporationInventors: Deqi Wang, Anand Chandrashekar, Raashina Humayun, Michal Danek