Abstract: A matching circuit, a radio frequency front-end power amplification circuit, and a mobile communication device are provided. The matching circuit is configurable for the radio frequency front-end power amplification circuit, including a first impedance matcher, a first bandpass filter, a first wave trap, and a first matching unit. An impedance of the first impedance matcher is a first preset impedance at a first frequency, the first bandpass filter is bridged between a front end of the first impedance matcher and ground, the first bandpass filter enables a signal of the first frequency to pass through, and suppresses at least one of a signal of a second frequency and a signal of third harmonic generation of the first frequency. The second frequency is lower than the first frequency. The first wave trap is bridged between a rear end of the first impedance matcher and the ground.

Abstract: A method for isolating transmission lines of a radio frequency power amplifier and a transmission structure of the radio frequency power amplifier are provided. The method includes steps of setting a distance between adjacent two of transmission lines on a chip substrate to be greater than 2.5 times a width of each of the transmission lines, and disposing shielding lines at an inner side of each of the transmission lines and an outer side of each of the transmission lines opposite to the inner side; wrapping a permalloy layer on an outer wall of each of the transmission lines; and wrapping an aluminum layer on an outer wall of the permalloy layer, defining a plurality of grooves on an outer wall of the aluminum layer at intervals, where the plurality of the grooves are recessed inward and in an inverted triangular structure.

Abstract: A resistor-capacitor oscillation circuit includes a first group of inverters, a second group of inverters, a latch, a delay circuit, and a third group of inverters. The first group of the inverters is connected to the delay circuit and is configured to generate a first signal A and a second signal B. An input end of the second group of the inverters is connected to an enable signal EN. An output end of the second group of the inverters is connected to the latch. An output end of the delay circuit is connected to the latch. The latch is connected to the third group of the inverters and includes a first output end and a second output end. After a first clock signal FB is driven by the third group of the inverters, an output signal CLK is output by an output end of the third group.

Abstract: A coplanar waveguide transmission line and a design method thereof are provided. The coplanar waveguide transmission line includes a first dielectric substrate, a center conductor strip, and two ground conductor strips. The first dielectric substrate has a first surface and a second surface opposite to each other. The center conductor strip and the ground conductor strips are stacked and fixed to the first surface. The center conductor strip includes a first segment and a second segment. A width of the first segment is greater than a width of the second segment, so that the first segment and the second segment form a step structure. A rectangular groove recessed toward the second surface is defined in the first surface, and a part of the center conductor strip is stacked and fixed to a side, distal from the second surface, of the rectangular groove to form a defected ground structure.

Abstract: A differential power amplifier includes an input matching network, a first-stage amplification circuit, a first inter-stage matching network, a second-stage amplification circuit, a second inter-stage matching network, a third-stage amplification circuit, and an output matching network. The first-stage amplification circuit and the second-stage amplification circuit are single-ended input single-ended output circuits. The third-stage amplification circuit is a dual input dual output circuit. The second inter-stage matching network includes a first transformer T1, a first capacitor C1, a second capacitor C2, a first inductor L1, and a second inductor L2. The output matching network includes a second transformer T2. The inter-stage matching networks and the output matching network are realized by the first transformer T1 and the second transformer T2, which reduces an inter-stage matching difficulty, optimizes input return loss and gain, and improves output power.

Abstract: A matching circuit structure for effectively suppressing the low-frequency clutter of a power amplifier of a mobile phone, falling within the technical field of radio frequency Pas is provided. The circuit structure includes an input end, a blocking capacitor, a power amplifier (PA), an output matching network and an output end connected in series; and the matching circuit structure further includes a negative feedback network connected in parallel to a transmission end of the PA; the negative feedback network includes a resonant capacitor, a resonant inductor and a matching inductor; the resonant capacitor and the resonant inductor are connected in parallel to form a frequency selecting network, and the frequency selecting network is connected in series with the matching inductor and to the ground. The matching circuit structure above can be used to effectively suppress the low-frequency clutter of a power amplifier.

Abstract: A circuit structure for improving the harmonic suppression capability of a radio frequency power amplifier includes an output stage unit, a high-order harmonic suppression unit, and a low-order harmonic suppression unit. The output stage unit outputs a signal to be subjected to harmonic suppression; the high-order harmonic suppression unit comprises a first filter capacitor and a back hole, and is used for suppressing fifth or higher harmonics; the output stage unit and the first filter capacitor are connected to the ground in series by means of the back hole; the low-order harmonic suppression unit is connected to the output stage unit to suppress second, third and fourth harmonics. According to the design, the high-harmonic suppression capability of the radio frequency power amplifier is improved.

Abstract: A circuit structure for improving the harmonic suppression capability of a radio frequency power amplifier includes an output stage unit, a high-order harmonic suppression unit, and a low-order harmonic suppression unit. The output stage unit outputs a signal to be subjected to harmonic suppression; the high-order harmonic suppression unit comprises a first filter capacitor and a back hole, and is used for suppressing fifth or higher harmonics; the output stage unit and the first filter capacitor are connected to the ground in series by means of the back hole; the low-order harmonic suppression unit is connected to the output stage unit to suppress second, third and fourth harmonics. According to the design, the high-harmonic suppression capability of the radio frequency power amplifier is improved.

Abstract: A power amplifier gain attenuation circuit includes: a gain attenuation (reduction) circuit configured to receive an input signal, an external drive signal and a bias voltage, and output a secondary input signal after attenuating the input signal depending on the drive signal and bias voltage; an amplifier including: a bias input terminal configured to receive a bias voltage; a signal input terminal configured to receive a secondary input signal, and an output terminal configured to output a gained output signal. The power amplifier gain attenuation circuit can reduce a gain effectively, and the amount of phase jump caused by the attenuation is quite small.

Abstract: A multi-mode multi-band power amplifier includes a controller, a wide-band amplifier channel and a fundamental impedance transformer. The controller receives an external signal and outputs a control signal according to the external signal. The wide-band amplifier channel receives single-band or multi-band RF signals through the input terminal, performs power amplification on the RF signals and outputs the RF signals through the output terminal. The fundamental impedance transformer includes a first segment shared by RF signals in all bands, second segments respectively special for RF signals in all bands, and a switching circuit controlled by the controller to separate RF signals subject to power amplification to the second segment in a switchable manner for multiplexed outputs.

Abstract: A power amplifier output power control circuit includes a first operational amplifier with a negative input terminal configured to receive a power control signal; a first PMOS transistor with a grid electrode connected to an output terminal of the first operational amplifier, a source electrode connected to an external power source, and a drain electrode grounded via a voltage dividing network; a power amplifier with a power end connected to the drain electrode of the first PMOS transistor, an input terminal configured to access to a signal to be amplified, and an output terminal configured to amplify the signal; and a current sampling circuit configured to produce sampling current after sampling current across the first PMOS transistor and providing a negative feedback signal for the positive input terminal of the first operational amplifier according to the sampling current such that total output power of the power amplifier keeps unchanged.

Abstract: A power amplifier gain attenuation circuit includes: a gain attenuation (reduction) circuit configured to receive an input signal, an external drive signal and a bias voltage, and output a secondary input signal after attenuating the input signal depending on the drive signal and bias voltage; an amplifier including: a bias input terminal configured to receive a bias voltage; a signal input terminal configured to receive a secondary input signal, and an output terminal configured to output a gained output signal. The power amplifier gain attenuation circuit can reduce a gain effectively, and the amount of phase jump caused by the attenuation is quite small.

Abstract: A power amplifier output power control circuit includes a first operational amplifier with a negative input terminal configured to receive a power control signal; a first PMOS transistor with a grid electrode connected to an output terminal of the first operational amplifier, a source electrode connected to an external power source, and a drain electrode grounded via a voltage dividing network; a power amplifier with a power end connected to the drain electrode of the first PMOS transistor, an input terminal configured to access to a signal to be amplified, and an output terminal configured to amplify the signal; and a current sampling circuit configured to produce sampling current after sampling current across the first PMOS transistor and providing a negative feedback signal for the positive input terminal of the first operational amplifier according to the sampling current such that total output power of the power amplifier keeps unchanged.

Abstract: A multi-mode multi-band power amplifier includes a controller, a wide-band amplifier channel and a fundamental impedance transformer. The controller receives an external signal and outputs a control signal according to the external signal. The wide-band amplifier channel receives single-band or multi-band RF signals through the input terminal, performs power amplification on the RF signals and outputs the RF signals through the output terminal. The fundamental impedance transformer includes a first segment shared by RF signals in all bands, second segments respectively special for RF signals in all bands, and a switching circuit controlled by the controller to separate RF signals subject to power amplification to the second segment in a switchable manner for multiplexed outputs.

Abstract: A power amplifier gain switching circuit includes: a gain controller configured to receive an external input signal, output a first input signal, receive an external drive signal, and output a control signal based on the drive signal; an amplifier including: a bias input terminal configured to receive an external bias voltage; a signal input terminal configured to receive the first input signal; a control terminal configured to receive the control signal; and an output terminal configured to output an output signal with a gain; wherein the amplifier is configured to switch a gain factor of the output signal based on the control signal.

Abstract: A power amplifier gain switching circuit includes: a gain controller configured to receive an external input signal, output a first input signal, receive an external drive signal, and output a control signal based on the drive signal; an amplifier including: a bias input terminal configured to receive an external bias voltage; a signal input terminal configured to receive the first input signal; a control terminal configured to receive the control signal; and an output terminal configured to output an output signal with a gain; wherein the amplifier is configured to switch a gain factor of the output signal based on the control signal.

Abstract: A multi-mode multi-band power amplifier and its circuits are provided. The power amplifier comprises a controller, a wide-band amplifier channel, and a fundamental impedance transformer. The controller receives an external signal and outputs a control signal according to the external signal. The wide-band amplifier channel receives a single-band or a multi-band RF signals through the input terminal, performs power amplification on the RF signals and outputs the RF signals through the output terminal. The fundamental impedance transformer comprises a first segment shared by RF signals in all bands, second segments respectively specific to RF signals in all bands, and a switching circuit controlled by the controller to separate a RF signal which is subject to power amplification to the second segment in a switchable manner for multiplexed outputs. A power amplifier output power control circuit, a gain switching circuit, and a gain attenuation circuit are also provided.

Abstract: A multi-mode multi-band power amplifier and its circuits are provided. The power amplifier comprises a controller, a wide-band amplifier channel, and a fundamental impedance transformer. The controller receives an external signal and outputs a control signal according to the external signal. The wide-band amplifier channel receives a single-band or a multi-band RF signals through the input terminal, performs power amplification on the RF signals and outputs the RF signals through the output terminal. The fundamental impedance transformer comprises a first segment shared by RF signals in all bands, second segments respectively specific to RF signals in all bands, and a switching circuit controlled by the controller to separate a RF signal which is subject to power amplification to the second segment in a switchable manner for multiplexed outputs. A power amplifier output power control circuit, a gain switching circuit, and a gain attenuation circuit are also provided.