Patents Assigned to Lattice Power (Jiangxi) Corporation
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Patent number: 9224597Abstract: A method for manufacturing gallium nitride-based film chip is provided. The method comprises: growing a gallium nitride-based semiconductor multilayer structure on a sapphire substrate; thinning and polishing the sapphire substrate; coating a reflecting compound metal layer on the gallium nitride-based semiconductor multilayer structure by evaporating; coating a first glue on the reflecting compound metal layer and solidifying the first glue with a first temporary substrate; peeling the sapphire substrate off by laser; coating a second glue on the peeling surface and solidifying the second glue with a second temporary substrate; removing the first temporary substrate and the first glue; bonding the reflecting compound metal layer with a permanent substrate by eutectic bonding; removing the second temporary substrate and the second glue.Type: GrantFiled: November 19, 2013Date of Patent: December 29, 2015Assignees: Lattice Power (JIANGXI) Corporation, Shineon (Beijing) Technology Co., Ltd.Inventors: Hanmin Zhao, Hao Zhu, Chuanbing Xiong, Xiaodong Qu
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Publication number: 20140147987Abstract: A method for manufacturing gallium nitride-based film chip is provided. The method comprises: growing a gallium nitride-based semiconductor multilayer structure on a sapphire substrate; thinning and polishing the sapphire substrate; coating a reflecting compound metal layer on the gallium nitride-based semiconductor multilayer structure by evaporating; coating a first glue on the reflecting compound metal layer and solidifying the first glue with a first temporary substrate; peeling the sapphire substrate off by laser; coating a second glue on the peeling surface and solidifying the second glue with a second temporary substrate; removing the first temporary substrate and the first glue; bonding the reflecting compound metal layer with a permanent substrate by eutectic bonding; removing the second temporary substrate and the second glue.Type: ApplicationFiled: November 19, 2013Publication date: May 29, 2014Applicants: Shineon (Beijing) Technology Co., Ltd, Lattice Power (JIANGXI) CorporationInventors: Hanmin Zhao, Hao Zhu, Chuanbing Xiong, Xiaodong Qu
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Patent number: 8461029Abstract: A method for fabricating quantum wells by using indium gallium nitride (InGaN) semiconductor material includes fabricating a potential well on a layered group III-V nitride structure at a first predetermined temperature in a reactor chamber by injecting into the reactor chamber an In precursor gas and a Ga precursor gas. The method further includes, subsequent to the fabrication of the potential well, terminating the Ga precursor gas, maintaining a flow of the In precursor gas, and increasing the temperature in the reactor chamber to a second predetermined temperature while adjusting the In precursor gas flow rate from a first to a second flow rate. In addition, the method includes annealing and stabilizing the potential well at the second predetermined temperature while maintaining the second flow rate. The method also includes fabricating a potential barrier above the potential well at the second predetermined temperature while resuming the Ga precursor gas.Type: GrantFiled: August 3, 2012Date of Patent: June 11, 2013Assignee: Lattice Power (JIANGXI) CorporationInventors: Fengyi Jiang, Li Wang, Chunlan Mo, Wenqing Fang
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Patent number: 8435816Abstract: One embodiment of the present invention provides a method for fabricating an InGaAlN light-emitting semiconductor structure. During the fabrication process, at least one single-crystal sacrificial layer is deposited on the surface of a base substrate to form a combined substrate, wherein the single-crystal sacrificial layer is lattice-matched with InGaAlN, and wherein the single crystal layer forms a sacrificial layer. Next, the InGaAlN light-emitting semiconductor structure is fabricated on the combined substrate. The InGaAlN structure fabricated on the combined substrate is then transferred to a support substrate, thereby facilitating a vertical electrode configuration. Transferring the InGaAlN structure involves etching the single-crystal sacrificial layer with a chemical etchant. Furthermore, the InGaAlN and the base substrate are resistant to the chemical etchant. The base substrate can be reused after the InGaAlN structure is transferred.Type: GrantFiled: August 22, 2008Date of Patent: May 7, 2013Assignee: Lattice Power (Jiangxi) CorporationInventors: Chuanbing Xiong, Fengyi Jiang, Li Wang, Shaohua Zhang, Guping Wang, Guangxu Wang
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Patent number: 8431475Abstract: One embodiment of the present invention provides a method for fabricating a group III-V nitride structure with an ohmic-contact layer. The method involves fabricating a group III-V nitride structure with a p-type layer. The method further involves depositing an ohmic-contact layer on the p-type layer without first annealing the p-type layer. The method also involves subsequently annealing the p-type layer and the ohmic-contact layer in an annealing chamber at a predetermined temperature for a predetermined period of time, thereby reducing the resistivity of the p-type layer and the ohmic contact in a single annealing process.Type: GrantFiled: August 31, 2007Date of Patent: April 30, 2013Assignee: Lattice Power (Jiangxi) CorporationInventors: Fengyi Jiang, Li Wang, Wenqing Fang, Chunlan Mo
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Patent number: 8431936Abstract: One embodiment of the present invention provides a method for fabricating a group III-V p-type nitride structure. The method comprises growing a first layer of p-type group III-V material with a first acceptor density in a first growing environment. The method further comprises growing a second layer of p-type group III-V material, which is thicker than the first layer and which has a second acceptor density, on top of the first layer in a second growing environment. In addition, the method comprises growing a third layer of p-type group III-V material, which is thinner than the second layer and which has a third acceptor density, on top of the second layer in a third growing environment.Type: GrantFiled: August 20, 2007Date of Patent: April 30, 2013Assignee: Lattice Power (Jiangxi) CorporationInventors: Fengyi Jiang, Li Wang, Wenqing Fang, Chunlan Mo
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Patent number: 8426325Abstract: One embodiment of the present invention provides a process for obtaining high-quality boundaries for individual multilayer structures which are fabricated on a trench-partitioned substrate. During operation, the process receives a trench-partitioned substrate wherein the substrate surface is partitioned into arrays of isolated deposition platforms which are separated by arrays of trenches. The process then forms a multilayer structure, which comprises a first doped layer, an active layer, and a second doped layer, on one of the deposition platforms. Next, the process removes sidewalls of the multilayer structure.Type: GrantFiled: July 6, 2011Date of Patent: April 23, 2013Assignee: Lattice Power (Jiangxi) CorporationInventors: Li Wang, Fengyi Jiang
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Patent number: 8383438Abstract: One embodiment of the present invention provides a method for fabricating light-emitting diodes. The method includes etching grooves on a growth substrate, thereby creating mesas on the growth substrate. The method further includes fabricating on each of the mesas an indium gallium aluminum nitride (InGaAlN) multilayer structure which contains a p-type layer, a multi-quantum-well layer, and an n-type layer. In addition, the method includes depositing one or more metal substrate layers on top of the InGaAlN multilayer structure. Moreover, the method includes removing the growth substrate. Furthermore, the method includes creating electrodes on both sides of the InGaAlN multilayer structure, thereby resulting in a vertical-electrode configuration.Type: GrantFiled: August 19, 2008Date of Patent: February 26, 2013Assignee: Lattice Power (JIANGXI) CorporationInventors: Chuanbing Xiong, Fengyi Jiang, Li Wang, Wenqing Fang, Guping Wang, Shaohua Zhang
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Patent number: 8384100Abstract: There is provided an InGaAlN light-emitting device and a manufacturing method thereof. The light emitting device includes a conductive substrate having a main surface and a back surface, a metal bonding layer formed on the main surface of the substrate, a light reflecting layer formed on the bonding layer, a semiconductor multilayer structure including at least a p-type and an n-type InGaAlN layer disposed on the reflecting layer, the p-type InGaAlN layer directly contacting the reflecting layer, and ohmic electrodes disposed on said n-type InGaAlN layer and on the back surface of the conductive substrate, respectively.Type: GrantFiled: May 26, 2006Date of Patent: February 26, 2013Assignee: Lattice Power (JIANGXI) CorporationInventors: Fengyi Jiang, Li Wang, Chuanbing Xiong, Wenqing Fang, Hechu Liu, Maoxing Zhou
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Patent number: 8361880Abstract: One embodiment of the present invention provides a semiconductor light-emitting device which includes a multi-layer structure. The multilayer structure comprises a first doped layer, an active layer, and a second doped layer. The semiconductor light-emitting device further includes a first Ohmic-contact layer configured to form a conductive path to the first doped layer, a second Ohmic-contact layer configured to form a conductive path to the second doped layer, and a support substrate comprising not less than 15% chromium (Cr) measured in weight percentage.Type: GrantFiled: October 26, 2006Date of Patent: January 29, 2013Assignee: Lattice Power (JIANGXI) CorporationInventors: Fengyi Jiang, Chuanbing Xiong, Wenqing Fang, Li Wang
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Patent number: 8354665Abstract: A light-emitting device includes a conductive substrate (320), a multilayer semiconductor structure situated above the conductive substrate including a n-type doped semiconductor layer (308), a p-type doped semiconductor layer (312) situated above the n-type doped semiconductor layer (308), and a MQW active layer (310) situated between the p-type and n-type doped semiconductor layer (308,312). The multilayer semiconductor structure is divided by grooves (300) to form a plurality of independent light-emitting mesas (304,306). At least one light-emitting mesa (304,306) comprises a color conversion layer (324,326).Type: GrantFiled: August 19, 2008Date of Patent: January 15, 2013Assignee: Lattice Power (JIANGXI) CorporationInventors: Fengyi Jiang, Li Wang, Junlin Liu, Yingwen Tang
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Patent number: 8222063Abstract: One embodiment of the present invention provides a method for fabricating light-emitting diodes (LEDs). The method includes fabricating an InGaAlN-based multilayer LED structure on a conductive substrate. The method further includes etching grooves of a predetermined pattern through the active region of the multilayer LED structure. The grooves separate a light-emitting region from non-light-emitting regions. In addition, the method includes depositing electrode material on the light-emitting and non-light-emitting regions, thereby creating an electrode. Furthermore, the method includes depositing a passivation layer covering the light-emitting and non-light-emitting regions. Moreover, the method includes removing the passivation layer on the electrode to allow the non-light-emitting regions which are covered with the electrode material and the passivation layer to be higher than the light-emitting region and the electrode, thereby protecting the light-emitting region from contact with test equipment.Type: GrantFiled: March 26, 2008Date of Patent: July 17, 2012Assignee: Lattice Power (Jiangxi) CorporationInventors: Li Wang, Fengyi Jiang
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Patent number: 8053757Abstract: One embodiment of the present invention provides a gallium nitride (GaN)-based semiconductor light-emitting device (LED) which includes an n-type GaN-based semiconductor layer (n-type layer); an active layer; and a p-type GaN-based semiconductor layer (p-type layer). The n-type layer is epitaxially grown by using ammonia gas (NH3) as the nitrogen source prior to growing the active layer and the p-type layer. The flow rate ratio between group V and group III elements is gradually reduced from an initial value to a final value. The GaN-based LED exhibits a reverse breakdown voltage equal to or greater than 60 volts.Type: GrantFiled: August 31, 2007Date of Patent: November 8, 2011Assignee: Lattice Power (Jiangxi) CorporationInventors: Fengyi Jiang, Li Wang, Wenqing Fang, Chunlan Mo, Yong Pu, Chuanbing Xiong
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Patent number: 8044416Abstract: One embodiment of the present invention provides a method for fabricating a high-power light-emitting diode (LED). The method includes etching grooves on a growth substrate, thereby forming mesas on the growth substrate. The method further includes fabricating indium gallium aluminum nitride (InGaAlN)-based LED multilayer structures on the mesas on the growth substrate, wherein a respective mesa supports a separate LED structure. In addition, the method includes bonding the multilayer structures to a conductive substrate. The method also includes removing the growth substrate. Furthermore, the method includes depositing a passivation layer and an electrode layer above the InGaAlN multilayer structures, wherein the passivation layer covers the sidewalls and bottom of the grooves.Type: GrantFiled: March 25, 2008Date of Patent: October 25, 2011Assignee: Lattice Power (Jiangxi) CorporationInventors: Li Wang, Fengyi Jiang, Yingwen Tang, Junlin Liu
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Patent number: 7977663Abstract: A semiconductor light-emitting device includes a multilayer semiconductor structure on a conductive substrate. The multilayer semiconductor structure includes a first doped semiconductor layer situated above the conductive substrate, a second doped semiconductor layer situated above the first doped semiconductor layer, and/or an MQW active layer situated between the first and second doped semiconductor layers. The device also includes a reflective ohmic-contact metal layer between the first doped semiconductor layer and the conductive substrate, which includes Ag, and at least one of: Ni, Ru, Rh, Pd, Au, Os, Ir, and Pt; plus at least one of: Zn, Mg Be, and Cd; and a number of: W, Cu, Fe, Ti, Ta, and Cr. The device further includes a bonding layer between the reflective ohmic-contact metal layer and the conductive substrate, a first electrode coupled to the conductive substrate, and a second electrode coupled to the second doped semiconductor layer.Type: GrantFiled: March 26, 2008Date of Patent: July 12, 2011Assignee: Lattice Power (Jiangxi) CorporationInventors: Yingwen Tang, Li Wang, Fengyi Jiang
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Patent number: 7943942Abstract: A light-emitting device includes a substrate, a first doped semiconductor layer situated above the substrate, a second doped semiconductor layer situated above the first doped layer, and a multi-quantum-well (MQW) active layer situated between the first and the second doped layers. The device also includes a first electrode coupled to the first doped layer and a first passivation layer situated between the first electrode and the first doped layer in areas other than an ohmic-contact area. The first passivation layer substantially insulates the first electrode from edges of the first doped layer, thereby reducing surface recombination. The device further includes a second electrode coupled to the second doped layer and a second passivation layer which substantially covers the sidewalls of the first and second doped layers, the MQW active layer, and the horizontal surface of the second doped layer.Type: GrantFiled: March 25, 2008Date of Patent: May 17, 2011Assignee: Lattice Power (JIANGXI) CorporationInventors: Fengyi Jiang, Junlin Liu, Li Wang
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Patent number: 7919784Abstract: One embodiment of the present invention provides a semiconductor light-emitting device, which comprises: an upper cladding layer; a lower cladding layer; an active layer between the upper and lower cladding layers; an upper ohmic-contact layer forming a conductive path to the upper cladding layer; and a lower ohmic-contact layer forming a conductive path the lower cladding layer. The lower ohmic-contact layer has a shape substantially different from the shape of the upper ohmic-contact layer, thereby diverting a carrier flow away from a portion of the active layer which is substantially below the upper ohmic-contact layer when a voltage is applied to the upper and lower ohmic-contact layers.Type: GrantFiled: September 29, 2006Date of Patent: April 5, 2011Assignee: Lattice Power (Jiangxi) CorporationInventors: Fengyi Jiang, Li Wang, Wenqing Fang
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Patent number: 7902556Abstract: One embodiment of the present invention provides a semiconductor light-emitting device which includes: (1) a silicon (Si) substrate; (2) a silver (Ag) transition layer which is formed on a surface of the Si substrate, wherein the Ag transition layer covers the Si substrate surface; and (3) an InGaAlN, ZnMgCdO, or ZnBeCdO-based semiconductor light-emitting structure which is fabricated on the Ag-coated Si substrate. Note that the Ag transition layer prevents the Si substrate surface from forming an amorphous overcoat with reactant gases used for growing the semiconductor light-emitting structure.Type: GrantFiled: November 17, 2006Date of Patent: March 8, 2011Assignee: Lattice Power (Jiangxi) CorporationInventors: Fengyi Jiang, Bilin Shao, Li Wang, Wenqing Fang
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Patent number: 7888779Abstract: There is provided a method of fabricating InGaAlN film on a silicon substrate, which comprises the following steps of forming a pattern structured having grooves and mesas on the silicon substrate, and depositing InGaAlN film on the surface of substrate, wherein the depth of the grooves is more than 6 nm, and the InGaAlN film formed on the mesas of both sides of the grooves are disconnected in the horizontal direction. The method may grow high quality, no crack and large area of InGaAlN film by simply treating the substrate. At the same time, there is also provided a method of fabricating InGaAlN light-emitting device by using the silicon substrate.Type: GrantFiled: April 14, 2006Date of Patent: February 15, 2011Assignee: Lattice Power (Jiangxi) CorporationInventors: Fengyi Jiang, Wenqing Fang, Li Wang, Chunlan Mo, Hechu Liu, Maoxing Zhou
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Patent number: 7829359Abstract: One embodiment of the present invention provides a method for fabricating a highly reflective electrode in a light-emitting device. During the fabrication process, a multilayer semiconductor structure is fabricated on a growth substrate, wherein the multilayer semiconductor structure includes a first doped semiconductor layer, a second doped semiconductor layer, and/or a multi-quantum-wells (MQW) active layer.Type: GrantFiled: March 26, 2008Date of Patent: November 9, 2010Assignee: Lattice Power (Jiangxi) CorporationInventors: Yingwen Tang, Li Wang, Fengyi Jiang