Abstract: An ESD protection apparatus includes a first clamping device and a second clamping device connected in series between a bias voltage bus and ground, and a switch coupled between an input/output pad and a common node of the first clamping device and the second clamping device, wherein the switch is configured such that before a bias voltage on the bias voltage bus has been established, a leakage current flowing through the first clamping device is reduced.
Abstract: An apparatus includes a high gain input stage configured as an integrator in a successive approximation register (SAR) analog-to-digital converter (ADC), a clamping and filtering stage configured to clamp a voltage on a high impedance node to a predetermined level approximately equal to a diode voltage drop in a clamping mode of an SAR cycle, and a decision-making stage connected to an output of the clamping and filtering stage.