Abstract: The present invention relates to circuit boards and, more specifically, a process for providing electrical connections with reduced via capacitance on circuit boards. In one embodiment, the present invention provides a method for providing an electrical connection between traces disposed on different layers of a circuit board, the method comprising forming in the board a via hole that extends between the different layers and interconnects a pair of electrically conductive traces disposed on the different layers. An inner sidewall of the via hole includes electrically conductive material thereon. The method further comprises removing a first portion of the conductive material from the inner sidewall by removing a first portion of the inner sidewall. A remaining portion of the conductive material on a remaining portion of the inner sidewall interconnects the pair of traces and has a corresponding width that is substantially similar to a width of each trace.

Abstract: An electronic system having a high speed signaling bus requiring training (calibration) of a calibrated item in a driver circuitry or a receiver circuitry for reliable operation. At manufacturing or in a secure location, secure calibration coefficients are determined for the electronic system and are stored in a non-volatile storage. During operation, the high speed signaling bus may be re-calibrated, resulting in a new currently active calibration coefficient for the calibrated item. A coefficient watchdog checks a new coefficient value selected by the re-calibration at present environmental conditions such as voltage and temperature against the secure calibration coefficients. If the new calibration coefficient value is the same as a calibration coefficient value in an acceptably close secure calibration coefficient, the new calibration coefficient is accepted; if not, a potentially probed warning is created by the coefficient watchdog.

Abstract: An air-cooling apparatus is provided which includes an air-cooling wall cooling airflow passing through an electronics rack(s) of a data center. The air-cooling wall is disposed separate from and in spaced relation to the air inlet or air outlet side(s) of the electronics rack(s), and includes a wall panel support structure disposed separate from the electronics rack(s), which supports one or more slidable wall panels. The slidable wall panel(s) includes an air-to-liquid heat exchanger slidably supported and disposed in spaced relation to the air outlet or air inlet side of the electronics rack(s). The heat exchanger extracts heat from air passing across the heat exchanger and is slidable within the support structure in a direction transverse to the direction of airflow through the rack(s). Slidable support of the heat exchanger by the support structure facilitates access to the air outlet or air inlet sides of the electronics rack(s).

Abstract: Methods, apparatuses, and computer program products of extending cache in a multi-processor computer are provided.

Abstract: Reassembly of fragments into a packet comprises receiving an incoming fragment of a packet from a network wherein each fragment comprises a segment of the packet and a header, generating a reassembly key using selected information from the incoming fragment header wherein the selected information is the same for all fragments of the packet, checking a reassembly table in a content addressable memory to find an entry that includes a logic key matching the reassembly key, and using a content index in the found entry and a sequence number of the incoming fragment within the packet, to determine a location offset in a reassembly buffer area for storing the incoming fragment at said location offset in the reassembly buffer area for the packet for reassembly.

Abstract: An apparatus, system, and method for deliberately preventing unauthorized access to data stored in a non-volatile memory device are disclosed. In one embodiment, an apparatus is configured to destroy the data stored on the memory device. The apparatus may comprise a printed circuit board (PCB), a non-volatile memory circuit electrically connected to the PCB, and a housing of the PCB. The non-volatile memory circuit may be scored to facilitate deliberately breaking the non-volatile memory circuit in response to an external force. In a further embodiment, the apparatus may comprise an electrical erase circuit powered by a power source connected to a switch. The electrical erase circuit may be configured to non-destructively erase the non-volatile memory circuit in response to activation of the switch. The system may further include a leverage tool configured to provide leverage to a non-volatile memory device affected by an external force.

Abstract: Methods, apparatuses, and computer program products for modifying the spatial orientation of a thermal acoustic panel of a computing enclosure rack are provided. Embodiments include receiving, by a configuration controller, a configuration preference from a user; identifying, by the configuration controller, a spatial orientation configuration corresponding to the configuration preference received from the user; and coordinating, by the configuration controller, movement of the thermal acoustic panel relative to a body of the computing enclosure rack in accordance with the identified spatial orientation configuration.

Abstract: A method and circuit for implementing a network manager quarantine mode in an interconnect system, and a design structure on which the subject circuit resides are provided. A respective network manager on a source interconnect chip and a destination interconnect chip sends end-to-end (ETE) heartbeats on each path between the source and destination interconnect chips. Each network manager maintains a heartbeat table with counters to track each path to each destination interconnect chip. When a first network manager of a first interconnect chip detects a change from at least one valid path to no working paths for a second interconnect chip of the interconnect chips, the quarantine mode is established for a programmable quarantine time interval and all paths are prevented from advertising good heartbeats during the quarantine time interval.

Abstract: A method of monitoring signals is disclosed, wherein a plurality of command signals and address signals are consecutively expressed, as a measurement target. The method includes setting a strobe timing that has a predetermined initial value; calculating an error rate by monitoring the plurality of command signals, in accordance with the strobe timing; monitoring the plurality of address signals, and calculating a burst rate from a difference between the consecutive plurality of address signals, in accordance with the strobe timing; identifying timing where the calculated error rate and calculated burst rate are both optimized; and in the event the timing where both the calculated error rate and calculated burst rate are optimized cannot be identified, altering a predetermined value of the set strobe timing, and repeating the calculating, monitoring, and identifying.

Abstract: In accordance with one embodiment of the invention, an I2C bus multiplexing circuit for use in an I2C bus interface can be provided. The I2C bus multiplexing circuit can facilitate multiplexer switching in an I2C bus interface by detecting a start command from an I2C master device via an I2C bus, buffering data from the I2C master device, detecting a clock frequency of a bus serial clock (SCL) line of the I2C master device, holding the serial data (SDA) line of the I2C master device in a clock stretch state and selecting a port based on the detected clock frequency of the SCL of the I2C master device. The method further can include sending the buffered data to an I2C slave device on the selected port. The method further can include receiving an acknowledgement from the I2C slave device on the selected port.

Abstract: A translation table has entries that each include a share bit and a delta bit, with pointers that point to a memory block that includes reuse bits. The share bit is set to indicate a translation table entry is sharing its memory block with another translation table entry. In addition, a translation table entry may include a private delta in the form of a pointer that references a memory fragment in the memory block that is not shared with other translation table entries, wherein the private delta references previously-stored content. When a translation table has a private delta, its delta bit is set. The private delta is generated by analyzing a data buffer for content that is similar to previously-stored content.

Abstract: A printer has a heat source disposed adjacent a temperature sensor to transfer heat upon activation across a portion of an introduced print media to the temperature sensor and a controller to receive a signal from the temperature sensor and to obtain a temperature signature generally identifying attributes of the introduced print media and to adjust print head settings in response to the identified attributes. The printer may further comprise a sensor to detect access to a print media storage compartment and to initiate examination of the heat transfer properties of the introduced print media upon detecting that the print storage compartment has been accessed.

Abstract: A system and method are provided wherein the voltage to a random access memory system may be automatically, dynamically adjusted without requiring an operating system to be restarted. In one embodiment, a target value of a voltage supplied to the memory system is dynamically selected. A system management mode is invoked in response to a change in the dynamically selected target value, including suspending a normal operation of the memory system. While in the system management mode, the voltage supplied to the memory system is adjusted according to the changed target voltage. A memory speed is adjusted according to the changed target value of the voltage. These steps are performed without restarting the computer system. The system management mode is exited and normal operation of the memory system may resume at the changed target voltage.

Abstract: Techniques are disclosed for providing thread specific protection levels in a multithreaded processing environment. An associated method includes generating a group of threads in a process, one of the group of threads opening a thread entity, and that one of the group of threads specifying one or more levels of access to the thread entity for the other threads. In one embodiment, when a first of the threads attempts to perform a specified operation on the thread entity, the method of this invention determines whether that first thread is the one of the group of threads that opened the thread entity. When the first thread is not that one of the group of threads, the first thread is allowed to perform the specified operation if and only if such operation is permitted by the specified one or more levels of access.

Abstract: A modular panel unit according to one embodiment includes a major subunit adapted for being secured to a keyed backing panel, and at least one minor subunit. The major subunit includes at least one connector adapted for coupling to a corresponding connection feature of the keyed backing panel in order to secure the major subunit to the keyed backing panel; and one or more coupling features. Each minor subunit includes: one or more couplers adapted for coupling to the one or more coupling features of the major subunit in order to secure the minor subunit to the major subunit. Additional systems and methods are also disclosed.

Abstract: A computer-implemented method is provided for reducing network traffic associated with live migration. The method comprises selecting a virtual machine on a first physical host for migration to a second physical host, and providing each application running in the selected virtual machine with notification that the migration has started. In response to receiving the notification that the migration has started, each application reducing the number of memory pages in use during the migration. The selected virtual machine and each application is then migrated from the first physical host to the second physical host, wherein the migration of each application includes migration of the reduced number of memory pages.

Abstract: A modular battery device may include a substantially planar dielectric substrate having a first major surface and a second major surface spaced from and opposite the first major surface. A plurality of conductive couplers may extend through the substrate from the first major surface to the second major surface at spaced locations. Each conductive coupler may have a first connector element disposed at the first major surface of the substrate electrically connected to an associated second connector element forming an extension extending from the second major surface of the substrate. The device may be selectively engageable with another such device by selectively mating the first connector element of a first conductive coupler on the device in mechanical and electrical engagement with the second connector element of a second conductive coupler on the other such device. Devices having batteries may be stacked to provide parallel and/or series connections.

Abstract: A serial peripheral interface (SPI) system including a bus adapter is disclosed. The bus adapter may include a data converter that may be adapted to receive respective first and second data from a first master output peripheral input (MOPI) line and a chip select line from a SPI master device. The data converter may also be adapted to interleave the first and second data, and the data converter may be adapted to transmit the interleaved first and second data synchronously with a second clock signal on a second MOPI line. The bus adapter may also include a clock rate adjuster adapted to generate the second clock signal to transmit to a SPI peripheral device. The second clock signal may be adapted to enable the SPI peripheral device to read the transmitted data.

Abstract: A method of testing an electronic device includes measuring radio frequency emissions at a plurality of positions relative to a trusted unit of a particular electronicdevice during operation of the trusted unit, and measuring radio frequency emissions at the same plurality of positions relative to a second unit of the particular electronic device. For each of the plurality of positions, the radio frequency emissions measured from the second unit are compared to the radio frequency emissions measured from the trusted unit. The method then determines whether there is any frequency at which the measured amplitude of the radio frequency emissions from the second unit and the measured amplitude of the radio frequency emissions from the trusted unit exhibit a statistically significant difference.

Abstract: Improving the operating efficiency of a rear door heat exchanger, including: determining, by a ventilation management module, a temperature differential between two temperature sensors in the rear door heat exchanger, the temperature differential indicative of cooling efficiency in the rear door heat exchanger; determining, by the ventilation management module, whether the temperature differential is greater than a predetermined threshold; and responsive to determining that the temperature differential is greater than the predetermined threshold, taking corrective action by the ventilation management module.