Abstract: An illuminated electrical load control is provided for controlling electrical power to a light-emitting diode (LED) lighting load. The load control includes a wall-box mounted housing, and an electrical switch assembly disposed at least partially within the housing. The switch assembly includes an actuator coupled to transition the switch assembly between an ON state, where AC current flows to the LED lighting load, and an OFF state, where current is interrupted from flowing to the LED lighting load. Further, the load control includes an illumination assembly with an indicator light to illuminate, at least in part, the load control when the switch assembly is in OFF state, and a current-limiting circuit connected across terminals of the switch assembly, and configured to limit leakage current through to the LED lighting load to below an activation current of the LED lighting load when the switch assembly is in the OFF state.

Abstract: A process for self testing a fault circuit includes disabling an actuator, performing a self-test by creating a simulated fault signal across at least a portion of a half cycle of a first polarity and across at least a portion of a half cycle of a second polarity, and determining whether the self-test was successful.

Abstract: Systems and methods for universal serial bus (USB) power delivery with multiple charging ports or connectors to charge multiple electronic devices. The systems include a power supply having converter(s) that converts an input voltage to different output voltages and outputs; charging ports electrically coupled to the power supply outputs; and a controller electrically coupled to the power supply and the charging ports or connectors. Each of the charging ports is configured to connect to and provide an output voltage selected from the different output voltages to an electronic device. The controller communicates or publishes information regarding the different output voltage levels that can be provided by the power supply to the electronic devices; receives voltage levels selected by the electronic devices via the charging ports; and controls the power supply to provide the selected voltages to the first and second device, respectively.

Abstract: Two-wire dimmer operation includes controlling conduction of power to a lighting load. In one aspect, based on a conduction angle adjustment, power supply voltage is monitored and a maximum conduction angle is established based thereon. In another aspect, a dimming level signal is received and a dimming level for a dimmer is set based on the received dimming level. The dimming level signal indicates a desired dimming level for a dimmer, and a maximum value for the dimming level signal is based on a dimmer power supply voltage. In yet another aspect, based on detecting an adjustment to increase a conduction angle of a dimmer, the conduction end angle is increased and the conduction start angle is also increased. This results in a net increase in the conduction angle for controlling operation of the dimmer.

Abstract: A machine learning model for classifying different lighting loads based on properties of electrical current through the loads is built. The model is applied to electrical data gathered based on powering a target lighting load in order to classify the load. Based on load classification, operating parameter(s) to control operation of a dimmer to control power to the load are selected and the dimmer is configured with the selected parameter(s) to achieve desired dimmer operation in dimming the load.

Abstract: A process for self testing a fault circuit includes disabling an actuator, performing a self-test by creating a simulated fault signal across at least a portion of a half cycle of a first polarity and across at least a portion of a half cycle of a second polarity, and determining whether the self-test was successful.

Abstract: A circuit interrupting device includes a grounded neutral transformer core, a high frequency transformer core, and a differential transformer core nested within the grounded neutral transformer core and/or the high frequency transformer core. The grounded neutral transformer core and the high frequency transformer core are disposed in a stacked configuration with one another.

Abstract: A process for self testing a fault circuit includes disabling an actuator, performing a self test by creating a simulated fault signal across at least a portion of a half cycle of a first polarity and across at least a portion of a half cycle of a second polarity, and determining whether the self test was successful.

Abstract: An apparatus includes an interruption circuit in a power delivery path, and a fault detection circuit configured to provide a fault signal to selectively cause the interruption circuit to interrupt power delivery, wherein the fault detection circuit includes a fault detection integrated circuit and a sensing coil configured to sense a differential current between a phase conductive path and a neutral conductive path in the power delivery path. A processor is configured to selectively control a fault simulation circuit to simulate a fault in the power delivery path, detect a response of the fault detection circuit to the simulated fault, and determine if the response of the fault detection circuit is an expected response. The processor provides an override signal to the interruption circuit to prevent the interruption circuit from receiving a fault signal from the fault detection circuit during, and for a predetermined time after, the simulated fault.

Abstract: Systems and methods for universal serial bus (USB) power delivery with multiple charging ports or connectors to charge multiple electronic devices. The systems include a power supply having converter(s) that converts an input voltage to different output voltages and outputs; charging ports electrically coupled to the power supply outputs; and a controller electrically coupled to the power supply and the charging ports or connectors. Each of the charging ports is configured to connect to and provide an output voltage selected from the different output voltages to an electronic device. The controller communicates or publishes information regarding the different output voltage levels that can be provided by the power supply to the electronic devices; receives voltage levels selected by the electronic devices via the charging ports; and controls the power supply to provide the selected voltages to the first and second device, respectively.

Abstract: Two-wire dimmer operation includes applying first and second control pulses to a switching circuit controlled between ON and OFF states, the first control pulse beginning at a first starting time and extending for a first duration of time that ends at a first ending time, and the second control pulse beginning at a second starting time, after the first ending time, and extending for a second duration of time that ends at a second ending time, detecting levels of current provided to a lighting load during the first duration of time and during the second duration of time, comparing current levels determined based on applying the first and second control pulses, based on the comparing, ascertaining a load type of the lighting load, and selecting, based on the ascertained load type, parameters that control dimming operation of the dimmer.

Abstract: An apparatus includes an interruption circuit in a power delivery path, and a fault detection circuit configured to provide a fault signal to selectively cause the interruption circuit to interrupt power delivery, wherein the fault detection circuit includes a fault detection integrated circuit and a sensing coil configured to sense a differential current between a phase conductive path and a neutral conductive path in the power delivery path. A processor is configured to selectively control a fault simulation circuit to simulate a fault in the power delivery path, detect a response of the fault detection circuit to the simulated fault, and determine if the response of the fault detection circuit is an expected response. The processor provides an override signal to the interruption circuit to prevent the interruption circuit from receiving a fault signal from the fault detection circuit during, and for a predetermined time after, the simulated fault.

Abstract: An arc fault circuit interrupter is disclosed. This arc fault circuit interrupter can include any one or more of three different sensors such as a high frequency sensor, and any one of lower frequency sensors such as a current sensor or a differential sensor. The arc fault circuit interrupter can be configured as an in line arc fault circuit interrupter installed in a wall box. In addition, the arc fault circuit interrupter can include a processor configured to determine any one of a series arc fault, or a parallel arc fault.

Abstract: An apparatus includes an interruption circuit in a power delivery path, and a fault detection circuit configured to provide a fault signal to selectively cause the interruption circuit to interrupt power delivery, wherein the fault detection circuit includes a fault detection integrated circuit and a sensing coil configured to sense a differential current between a phase conductive path and a neutral conductive path in the power delivery path. A processor is configured to selectively control a fault simulation circuit to simulate a fault in the power delivery path, detect a response of the fault detection circuit to the simulated fault, and determine if the response of the fault detection circuit is an expected response. The processor provides an override signal to the interruption circuit to prevent the interruption circuit from receiving a fault signal from the fault detection circuit during, and for a predetermined time after, the simulated fault.

Abstract: An arc fault circuit interrupter is disclosed. This arc fault circuit interrupter can include any one or more of three different sensors such as a high frequency sensor, and any one of lower frequency sensors such as a current sensor or a differential sensor. The arc fault circuit interrupter can be configured as an in line arc fault circuit interrupter installed in a wall box. In addition, the arc fault circuit interrupter can include a processor configured to determine any one of a series arc fault, or a parallel arc fault.

Abstract: A timing device is disclosed which is for controlling electronic devices and which is mounted in a wall switch box. This timing device comprises at least one controller, at least one transceiver in communication with the controller, at least one interface; and at least one cover plate. This device can also include at least one key coupled to the cover plates for interacting with the interface when said cover plate is inserted onto said at least one interface.

Abstract: A system is disclosed for controlling operation of an LED lighting system, including a Power over Ethernet (PoE) LED driver couplable to a PoE switch via a power and communication link. The PoE LED driver includes a microcontroller for controlling an LED driver chip to operate an associated LED lighting fixture. A voltage and current measurement unit is coupled to the microcontroller to receive power from the power and communication link, and to provide signals to the microcontroller. The provided signals can be representative of an input electrical parameter of the power and communication link. The microcontroller is programmed to compare the signals representative of the input electrical parameter against a predetermined value, and command operation of the LED driver chip based on the comparison.

Abstract: An apparatus includes an interruption circuit in a power delivery path, and a fault detection circuit configured to provide a fault signal to selectively cause the interruption circuit to interrupt power delivery, wherein the fault detection circuit includes a fault detection integrated circuit and a sensing coil configured to sense a differential current between a phase conductive path and a neutral conductive path in the power delivery path. A processor is configured to selectively control a fault simulation circuit to simulate a fault in the power delivery path, detect a response of the fault detection circuit to the simulated fault, and determine if the response of the fault detection circuit is an expected response. The processor provides an override signal to the interruption circuit to prevent the interruption circuit from receiving a fault signal from the fault detection circuit during, and for a predetermined time after, the simulated fault.

Abstract: A process for self testing a fault circuit includes disabling an actuator, performing a self test by creating a simulated fault signal across at least a portion of a half cycle of a first polarity and across at least a portion of a hall cycle of a second polarity, and determining whether the self test was successful.

Abstract: An arc fault circuit interrupter is disclosed. This arc fault circuit interrupter can include any one or more of three different sensors such as a high frequency sensor, and any one of lower frequency sensors such as a current sensor or a differential sensor. The arc fault circuit interrupter can be configured as an in line arc fault circuit interrupter installed in a wall box. In addition, the arc fault circuit interrupter can include a processor configured to determine any one of a series arc fault, or a parallel arc fault.