Abstract: A method and apparatus is disclosed for identifying a block being stored within flash memory devices using a cluster address for each block, the block being selectively erasable and having one or more sectors, the cluster address being stored in one of the sectors of the block. In an alternative embodiment, the cluster address is stored in at least two different sectors within the same block for ensuring that the information last written to the block is valid. Further disclosed is a novel way to use a defect flag for each block stored within the flash memory device for efficiently identifying non-defective blocks upon system power-up.

Abstract: A microprocessor-controlled solid state storage system having a controller and non-volatile memory for storing firmware code therein. The controller includes first memory for storing firmware code transferred from the non-volatile memory, and second memory including primitive firmware code stored therein causing execution of a microprocessor for transferring the firmware code from reserved blocks in the non-volatile memory into the first memory upon initialization of the storage system and causing calculation of a checksum for verification of the integrity of the firmware code.

Abstract: A multi-level NAND architecture non-volatile memory device reads and programs memory cells, each cell storing more than one bit of data, by comparing to a constant current level while selectively adjusting the gate voltage on the cell or cells being read or programmed. A plurality of read and write reference cells are provided each programmed to correspond to one each of the multi-level programming wherein during reading of the memory cells, the read reference cells provide the constant current level and during writing to the memory cells, the write reference cells provide the same. Furthermore, during a read operation, corresponding write reference cells are coupled to read reference cells to gauge the reading time associated with reading of memory cells.