Abstract: A gate element is first formed on a substrate, then a gate insulating layer formed on the substrate while covering the gate element. After forming an ohmic contact layer on a portion of the gate insulating layer corresponding to the gate element, source and drain electrodes are formed on the ohmic contact layer simultaneously with forming a first common electrode on the gate insulating layer. Next, a storage capacitor layer is formed on the source and drain electrodes and the first common electrode, then first and second contact holes are respectively formed on a first portion of the storage capacitor layer corresponding to the drain electrode and a second portion of the storage capacitor layer the first common electrode, respectively. Finally, a sensing electrode and a second common electrode are formed on the storage capacitor layer such that the pixel and second common electrodes contact the drain electrode and the first common electrode through the first and second contact holes, respectively.