Abstract: An automatic voltage compensation circuit in a voltage regulator compensates the output voltage for a voltage drop along lines leading to a remote load. A load capacitor is connected across the load for providing a low impedance across the load during a test phase of the regulator. In one embodiment, during the test phase, the load current is changed up or down a small percentage (e.g., 10%). As a result, the regulator voltage changes due only to the line resistance since the load is bypassed by the load capacitor. The voltage drop at full load current is then derived by detecting the change in regulator output voltage (a fractional voltage drop) and multiplying it. The normal mode is resumed, and the derived voltage drop is added to the regulator output by either compensating the feedback loop or by adding the voltage drop to the output of the regulator.

Abstract: A switching circuit configured to reduce the effects of signal oscillation on the operation of the switching circuit is provided. The switching circuit may include signal oscillation and detection circuitry that suppresses control signals during a detected oscillation, allowing stored energy to naturally decay in the switching circuit and thereby prevent unwanted extension of the oscillation that may be caused by the repeated switching of a semiconductor element coupled between the input and output of the switching circuit.

Abstract: A testing procedure may determine whether a monolithic voltage reference device meets a temperature drift specification. A first non-room temperature output voltage of the monolithic voltage reference device may be measured while the monolithic voltage reference device is at a first non-room temperature which is substantially different than room temperature. First non-room temperature information may be stored in a memory within the monolithic voltage reference device which is a function of the first non-room temperature output voltage. A second non-room temperature output voltage of the monolithic voltage reference device may be measured while the monolithic voltage reference device is at a second non-room temperature which is substantially different than the room temperature and the first non-room temperature. Second non-room temperature information may be stored in the memory without destroying the first non-room temperature information which is a function of the second non-room temperature output voltage.

Abstract: A circuit includes a digital-to-analog converter configured to produce an analog output signal (1) proportional to a reference signal and (2) as a function of a digital input signal. The converter comprises a plurality of non-trivially complex admittances configured so that each non-trivially complex admittance can be selectively switched as a function of the digital input signal so as to be coupled between a reference terminal configured to receive a reference signal and an output terminal. The method comprises selectively switching non-trivially complex admittances as a function of the digital signal between a reference terminal and an output terminal.

Abstract: In order to overcome the three main obstacles to obtaining a fast and accurate average current limit in a DC/DC converter, three distinct improvements are provided which can work in concert to achieve the goal. Each of the three parts comprises significant new improvements, and their use together to create an average current limit is also believed to be novel. The first improvement relates to providing a bias signal control configured to apply a variable DC bias signal to the compensation ramp signal generated in the DC/DC converter so that the compensating ramp signal is biased to zero at the end of each ON-time for each cycle so that the peak current limit is independent of the duty cycle of the pulse width modulation signal during current limit conditions.

Abstract: A DC/DC converter and a method protect a MOSFET driven by the converter from overcurrent conditions. No extra pins are required to sense the current, which saves IC package area and cost.

Abstract: A current mode power conversion system and method are described that provide a stable output voltage and a maximum-limited output current to a load. The system comprises: a feedback control linearly operable so as to control the output voltage across the load during constant load conditions, and non-linearly operable so as to control the output voltage across the load during certain detected changes in load conditions above a predetermined threshold so as to speed up the transient response of the power conversion system.

Abstract: Circuits and methods that improve the performance of voltage reference driver circuits and associated analog to digital converters are provided. A voltage reference driver circuit that maintains a substantially constant output voltage when a load current is modulated by an input signal is provided. The voltage reference driver circuit synchronously decouples a voltage regulation circuit from the load circuit when modulating events such as pulses caused by the load circuit during a switching interval are generated, preventing disturbance of the regulation circuitry and keeping its output voltage substantially constant.

Abstract: A semiconductor device is configured to provide current and voltage isolation inside an integrated circuit package. The semiconductor device includes first and second semiconductor dies, a first isolating block positioned on the first semiconductor die, and a second isolating block positioned on the second semiconductor die. The semiconductor device also includes a first interconnect coil having a plurality of wires connecting the first semiconductor die to the second isolating block, and a second interconnect coil having a plurality of wires connecting the second semiconductor die to the first isolating block.

Abstract: A semiconductor device such as a field-effect transistor, improved to reduce device resistance, comprises a leadframe which includes a die paddle integral with a first set of leads and a second set of leads that is electrically isolated from the first set, a semiconductor die having its lower surface positioned on, and electrically connected to, the die paddle, and a conductive layer on the upper surface of the die. At least one electrically conductive wire, preferably plural wires, extend laterally across the second surface of the semiconductor die, are in electrical contact with the conductive layer, and interconnect corresponding second leads on opposite sides of the die. The plural wires may be welded to leads in succession by alternate ball and wedge bonds on each lead. The conductive layer may be an aluminized layer on which is formed a thin layer a solderable material, such as tin. A solder is deposited on the tin layer, enmeshing the wires.

Abstract: During burst mode operation of a four switch buck-boost converter, the input voltage and an output voltage can be detected and a preset peak charging current threshold level can be modulated when the difference between the input voltage and output voltage is within a prescribed range. A burst mode charging cycle will progress until the modulated peak charging threshold level is attained and cut off at the set peak level. A charge transfer cycle and discharge cycle may proceed thereafter.

Abstract: Novel techniques for balancing current drawn from multiple power supply inputs. A multiple-input inductor is coupled between the power supply inputs and the switching circuits associated with the respective power supply inputs for balancing voltages applied to each of the switching circuits.

Abstract: Novel system and methodology for detecting a Powered Device (PD) in a Power over Ethernet (PoE) system. A PD probing circuit generates a detection signal supplied to the PD and determines a PD response signal produced in response to the detection signal. Based on the PD response signal, the control circuit determines a detection value for identifying the PD. In particular, the control circuit concludes that the PD is a device satisfying a PoE standard if the detection value is in a first predetermined range, and concludes that the PD is a legacy PD device if the detection value is in a second predetermined range outside of the first predetermined range.

Abstract: A testing procedure may determine whether a monolithic voltage reference device meets a temperature drift specification. A first non-room temperature output voltage of the monolithic voltage reference device may be measured while the monolithic voltage reference device is at a first non-room temperature which is substantially different than room temperature. First non-room temperature information may be stored in a memory within the monolithic voltage reference device which is a function of the first non-room temperature output voltage. A second non-room temperature output voltage of the monolithic voltage reference device may be measured while the monolithic voltage reference device is at a second non-room temperature which is substantially different than the room temperature and the first non-room temperature. Second non-room temperature information may be stored in the memory without destroying the first non-room temperature information which is a function of the second non-room temperature output voltage.

Abstract: Control circuitry controls a boost regulator during a start-up period. The control circuitry may comprise an oscillator for generating a clock signal. The oscillator may be configured for ramping up a frequency of the clock signal in accordance with an voltage to be applied to the oscillator and varied during the start-up period. The control circuit may further include a switching circuit configured for controlling a power switch of the boost regulator in response to the clock signal from the oscillator. The switching circuit can control the power switch to have an on-time which is largely independent of the operating frequency of the oscillator. The voltage to be applied to the oscillator may have the same initial voltage level upon startup of the control circuit, independent of an output voltage of the boost regulator.

Abstract: Variable gain amplifiers offering high frequency response with improved linearity and reduced power dissipation are provided. An amplifier is disclosed that is constructed from a one-stage topology with multiple signal paths and compensation networks for improved linearity and stable operation. In this amplifier, improved performance is obtained by replacing single transistor components with enhanced active devices which incorporate local negative feedback. One embodiment of the invention is a transconductance enhancement circuit that improves transconductance and input impedance relative to the prior art. A further development is an enhanced active cascode circuit that provides improved linearity. A high frequency bipolar transistor switch is also disclosed that incorporates lateral PNP transistors as high frequency switches with improved OFF-state to ON-state impedance ratio to realize a variable gain function.

Abstract: A pulse width modulation circuit may generate an adjustable output signal that periodically transitions between a first and a second state with an adjustable duty cycle. A first pulse generator circuit may be configured to generate a first pulse signal that periodically transitions at an adjustable delay with respect to a periodic reference signal. A second pulse generator circuit may be configured to generate a second pulse signal that periodically transitions at an adjustable delay with respect to the periodic reference signal. A logic circuit may be configured to generate the adjustable output signal based on both the first and the second pulse signals.

Abstract: A power supply system includes a regulator for receiving an input voltage and producing an output voltage, the regulator including an output device and a controller coupled to the regulator. The controller is configured to monitor at least one operating parameter of the output device and, in response, generate a control signal that adjusts the input voltage to a minimum input voltage needed to maintain the output device in saturation regardless of variation in the monitored operating parameter.

Abstract: An integrated connecting device for coupling a communication link to a powered device (PD) in a system for supplying power to the PD over the communication link. The integrated connecting device has a housing configured for providing connection to the PD external with respect to the housing, communication interface circuitry coupled to the communication link for supporting data communication of the PD over the communication link, and power interface circuitry coupled to the communication interface circuitry for implementing a power supply protocol performed to supply power to the PD over the communication link. The communication interface circuitry and the power interface circuitry being held by the housing.

Abstract: A novel system and methodology for supplying power over a communication cable, such as an Ethernet cable, using power distribution circuitry for controlling power distribution between wires or pairs of wires in the communication cable. The power distribution circuitry may control distribution of current among wires or pairs of wires in the communication cable. In particular, balance of current among the wires or pairs of wires may be provided.