Patents Assigned to Linear Technology Inc.
  • Patent number: 5589709
    Abstract: A capacitor is provided including first and second electrodes formed from portions of the lead frame structure used in conventional integrated circuit packaging. The electrodes are encapsulated with dielectric molding material which provides dielectric insulation between the electrodes. A low power capacitively-coupled digital isolator circuit is also provided. The circuit employs a pair of the lead frame capacitors of the present invention and includes differential driver and receiver circuits. The receiver can also include an optional filter for increasing noise and glitch immunity.
    Type: Grant
    Filed: March 8, 1995
    Date of Patent: December 31, 1996
    Assignee: Linear Technology Inc.
    Inventors: Robert C. Dobkin, Robert L. Reay
  • Patent number: 4953007
    Abstract: A plastic encapsulated integrated circuit package in which a chip is secured to the upper surface of a base and is connected to leads which have their lower surfaces in a plane above that of the bottom of the base. An electrostatic shield is electrically connected to the bottom of the base and underlies the leads without touching them, to reduce crosstalk. The support for the base is integrally connected by a conductive strip to the lead for the ground pin of the chip, to ground the shield. The whole is plastic encapsulated. To permit encapsulation, the shield extends towards but stops short of the dam bars for the leads.
    Type: Grant
    Filed: October 21, 1988
    Date of Patent: August 28, 1990
    Assignee: Linear Technology Inc.
    Inventor: George Erdos
  • Patent number: 4920016
    Abstract: A composition of liposomes which contain an entrapped pharmaceutical agent and are characterized by (a) liposome sizes predominantly between about 0.07 and 0.5 microns; (b) at least about 50 mole percent of a membrane-rigidifying lipid, such as sphingomyelin or neutral phospholipids with predominantly saturated acyl chains; and (c) between about 5-20 mole percent of a glycolipid selected from the group consisting of ganglioside GM.sub.1, saturated phosphatidylinositol, and monogalactosyl stearate. The liposomes show high blood/RES tissue distribution ratios, and are effective for drug administration to tumors via intravenous drug delivery.
    Type: Grant
    Filed: December 18, 1987
    Date of Patent: April 24, 1990
    Assignee: Linear Technology, Inc.
    Inventors: Theresa M. Allen, Alberto Gabizon
  • Patent number: 4827156
    Abstract: A push-pull circuit in which an output terminal is alternately connected to first and second voltage potentials through first and second bipolar transistors, first biasing circuitry is provided for controlling the conductance of the first transistor with the first biasing circuitry being responsive to the base/emitter voltage of the second transistor whereby the first transistor cannot be biased on while the second transistor is conductive, and biasing circuitry is provided for the second transistor with the second bias circuitry being responsive to base/emitter voltage of the first transistor whereby the second transistor cannot be biased on while the first transistor is conductive.
    Type: Grant
    Filed: December 1, 1987
    Date of Patent: May 2, 1989
    Assignee: Linear Technology Inc.
    Inventor: Dennis P. O'Neill
  • Patent number: 4812961
    Abstract: A charge pump circuit is integrated form utilizes a dual emitter transistor switch having low saturation voltage. The low saturation voltage for the transistor is provided by deriving a base bias voltage from the doubled voltage (2V.sub.cc) and a collector voltage from the voltage supply (V.sub.cc). Current-limiting for the transistor is provided by connecting one emitter to the base bias circuitry whereby the second emitter acts as a collector when the transistor saturates, thereby limiting the base drive and causing current-limiting.
    Type: Grant
    Filed: May 15, 1987
    Date of Patent: March 14, 1989
    Assignee: Linear Technology, Inc.
    Inventors: Robert Essaff, Robert C. Dobkin
  • Patent number: 4786855
    Abstract: A bias control loop forms a voltage regulator for providing the bias voltage to the collectors of bipolar current source transistors in a linear circuit. The bias loop functions by maintaining equal or related base/emitter voltages on the several transistors. By properly sizing the emitter areas of the transistors, interrelated voltages and transistor biases are provided in the loop. The bias loop works down to less than 1 volt and is stable without a compensation capacitor.
    Type: Grant
    Filed: February 4, 1988
    Date of Patent: November 22, 1988
    Assignee: Linear Technology Inc.
    Inventors: Dennis P. O'Neill, Carl T. Nelson
  • Patent number: 4719430
    Abstract: A class B push-pull integrated circuit suitable for low voltage operation, having two symmetrical halves. Each half circuit has first and second opposite conductivity type transistors having their collectors connected together to the base of a class B driver transistor, the collector of which drives the base of an output transistor. An AC input signal is divided into in-phase and anti-phase components one of which is applied to the base of each first transistor. An AC feedback loop extends from the collector of the fourth transistor through a voltage divider and level shifter to the base of the second transistor. A DC feedback loop extends from the base of the fourth transistor through a fifth transistor to the base of the second transistor. Decoupling capacitors extend from the bases of the fifth transistors and through a diode to ground. The arrangement allows use of small decoupling capacitors, and a current forced through the diode eliminates turn-on delay.
    Type: Grant
    Filed: June 25, 1986
    Date of Patent: January 12, 1988
    Assignee: Linear Technology Inc.
    Inventor: William A. Cole
  • Patent number: 4633166
    Abstract: An integrated circuit unity gain buffer amplifier suitable for low voltage operation, in which the input signal is applied to the base of a common emitter NPN transistor first stage. The collector of the first stage is connected to the base of an emitter follower NPN transistor second stage. The emitter of the second stage is connected to the base of an emitter follower PNP transistor third stage. The collector of the first stage is loaded by a constant current source and its emitter is connected through a resistance to ground. The collector and emitter of the second and third stages respectively are connected together through a resistor to the supply voltage. The emitter of the second stage is connected through a resistance to ground. The collector of the third stage is connected both to the output terminal and to the emitter of the first stage. This allows the circuit to operate at a very low supply voltage without any transistor operating in practical saturation.
    Type: Grant
    Filed: October 7, 1985
    Date of Patent: December 30, 1986
    Assignee: Linear Technology Inc.
    Inventor: William A. Cole
  • Patent number: 4622692
    Abstract: Electronic circuitry as described which enhances the intelligibility of a speech signal corrupted by low-frequency noise while tending to retain frequency components of the signal characteristic of natural-sounding speech. The circuitry includes a broad band channel which passes the speech signal with little spectral distortion. A high-pass channel produces a high-pass signal corresponding to high-frequency components of the speech signal, components which in themselves provide the human ear with considerable information for discernment of different sounds. An operational amplifier in a summing configuration combines the broadband and high-pass signals to produce a processed speech signal with enhanced intelligibility.
    Type: Grant
    Filed: October 10, 1984
    Date of Patent: November 11, 1986
    Assignee: Linear Technology Inc.
    Inventor: William A. Cole
  • Patent number: 4506169
    Abstract: An electronic device for generating a signal indicative of the peak magnitude of an alternating voltage signal is described. The device includes a voltage-to-current converter that generates a current signal comprising a quiescent current and an alternating current signal which varies directly with the alternating voltage signal. A current sink absorbs the current signal up to a controllable maximum current level. A charge current is generated when the current signal exceeds the maximum current level, and is delivered to a capacitor. Feedback circuitry varies the maximum current level of the current sink directly with the resulting capacitor voltage. The capacitor voltage is consequently indicative of the peak magnitude of the alternating voltage signal. A discharge current is applied to the capacitor so that the capacitor voltage can decrease in response to a decrease in the peak magnitude of the alternating voltage signal.
    Type: Grant
    Filed: February 23, 1982
    Date of Patent: March 19, 1985
    Assignee: Linear Technology Inc.
    Inventor: William A. Cole
  • Patent number: 4085382
    Abstract: A low level, low power, direct coupled integrated class B amplifier having a dual channel three stage preamplifier and a pair of output transistors, one for each channel. In each channel, a DC negative feedback loop connects the collector of the last stage preamplifier transistor to the base of the first stage preamplifier transistor to regulate the DC levels, and a resistive AC negative feedback loop connects the output transistor collector to the first preamplifier transistor collector to reduce the gain dependence of the channel on the current through the output transistor, thus enabling very low idle currents for the output transistors and also providing low distortion output. The resistor in each AC feedback loop is a floating tub resistor to enable it to be taken more than 0.6 volts above the battery voltage. Common mode rejection is provided for at least two of the three preamplifier transistors of each channel.
    Type: Grant
    Filed: November 22, 1976
    Date of Patent: April 18, 1978
    Assignee: Linear Technology Inc.
    Inventors: Herbert Douglas Barber, Gary Curtis Salter
  • Patent number: 4034306
    Abstract: An integrated circuit direct coupled amplifier capable of operating from a single battery cell, has: a differential amplifier input stage having an input transistor and a second transistor; an intermediate gain stage; and an output stage. Signal is fed back from the output stage to the base of the second transistor of the differential amplifier, through a negative feedback circuit. Current sources are connected as loads in the collector circuits of the input transistor of the differential amplifier and the transistor of the intermediate gain stage. The current sources are biased by separate bias sources, to improve stability. The bias source for the intermediate gain stage current source also biases a current source for the feedback circuit. A starting circuit is connected to the bias source for the intermediate gain stage and provides self starting for the current sources.
    Type: Grant
    Filed: April 16, 1976
    Date of Patent: July 5, 1977
    Assignee: Linear Technology Inc.
    Inventors: Herbert Douglas Barber, Gary Curtis Salter