Abstract: Systems, methods, and software are disclosed herein having enhanced modular carrier form factors. In an implementation, a network card apparatus comprises a network card assembly. The network card assembly comprises a network interface card and a connector card coupled to the network interface card and comprising a U.2 connector configured to mate with a U.2 connector of the modular bay of the rackmount chassis assembly.

Abstract: A data system includes a plurality of storage drives each comprising a multi-lane serial drive interface. The data system also includes a control system configured to receive, over a host link, a write operation for storage of data, process a storage address of the write operation against storage allocation information to apportion the data for storage among more than one target storage drive, and transfer corresponding portions of the data to the target storage drives.

Abstract: Systems, methods, apparatuses, and architectures for storage interposers are provided herein. In one example, an apparatus includes a host connector configured to couple to one or more host systems over associated host Peripheral Component Interconnect Express (PCIe) interfaces, and PCIe switch circuitry configured to receive storage operations over the host connector that are issued by the one or more host systems. The PCIe switch circuitry is configured to monitor when ones of the storage operations correspond to an address range and responsively indicate the ones of the storage operations to a control module. The control module is configured to selectively direct delivery of the ones of the storage operations to corresponding storage areas among one or more storage devices based at least on addressing information monitored for the ones of the storage operations in the PCIe switch circuitry.

Abstract: Systems, methods, apparatuses, and software for computing systems are provided herein. In one example, a system includes a plurality of first modules each having a Peripheral Component Interconnect Express (PCIe) interface and a processor, and a plurality of second modules each having a PCIe interface. PCIe switch circuitry is coupled to the PCIe interfaces of the first modules and the PCIe interfaces of the second modules, wherein the PCIe switch circuitry is configured to establish logical isolation in the PCIe switch circuitry between one or more first modules and one or more second modules. At least one processor instantiates access to the one or more second modules for the one or more first modules over at least the logical isolation in the PCIe switch circuitry.

Abstract: Deployment of arrangements of computing components coupled over a communication fabric are presented herein. In one example, a method includes detecting first computing components communicatively coupled to a first communication fabric having a first communication fabric type, and detecting second computing components communicatively coupled to a second communication fabric having a second communication fabric type. The method also includes receiving user commands to form compute units among a pool of computing components comprising the first computing components and the second computing components. Based at least on the user commands, the method includes forming the compute units for use by one or more users.

Abstract: Machine templates are described herein that provide for enhanced configuration and deployment of arrangements of physical computing components coupled over a communication fabric. In one example, a method includes presenting a user interface indicating a plurality of templates each specifying at least a predefined arrangement of physical computing components for inclusion in compute units, and receiving a user selection indicating a selected template among the plurality of templates to form a target compute unit. The method includes allocating to the target compute unit a set of physical computing components according to the selected template, and instructing a management entity to establish the target compute unit based at least on logical partitioning within a communication fabric communicatively coupling the set of physical computing components of the target compute unit.

Abstract: Deployment of arrangements of physical computing components coupled over a communication fabric are presented herein. In one example, a method includes detecting disaggregated computing components communicatively coupled to at least a first communication fabric, and detecting converged computing components communicatively coupled to a second communication fabric. The method includes forming a free pool of computing components comprising the disaggregated computing components and the converged computing components, and receiving user commands to form compute units from among computing components included in the free pool of computing components. Based at least on the user commands, the method includes forming the compute units for use by one or more users.

Abstract: Machine policies are described herein that provide for enhanced operation and dynamic alteration of compute units comprising physical computing components coupled over a communication fabric. In one example, a method includes presenting a user interface indicating a plurality of policies specifying operational triggers and responsive actions for altering composition of compute units, receiving a first user selection indicating a set of physical computing components to form a target compute unit, and receiving a second user selection indicating a selected policy among the plurality of policies to apply to the target compute unit.

Abstract: A data storage device is presented that includes a plurality of storage drives each comprising an associated drive Peripheral Component Interconnect Express (PCIe) interface. The data storage device also includes a control system configured to receive, over a host PCIe link, write operations for storage of data by the data storage device. The control system is configured to process the write operations against storage allocation information to apportion the data for storage among more than one of the storage drives, and transfer corresponding portions of the data to associated storage drives over corresponding drive PCIe interfaces.

Abstract: Disaggregated computing architectures, platforms, and systems are provided herein. In one example, a data system is provided. The data system includes a first assembly comprising a plurality of modular storage bays populated with one or more graphics processing modules each including a graphics processing unit (GPU), wherein the plurality of modular storage bays each comprise a bay connector that includes a bay Peripheral Component Interconnect Express (PCIe) connection. The first assembly further comprises PCIe switch circuitry configured to communicatively couple the bay PCIe connections to a PCIe fabric over one or more external PCIe links.

Abstract: Computing architectures, platforms, and systems are provided herein. In one example, a system is provided. The system includes a communication arrangement for peripheral component interconnect express (PCIe) traffic transferred over a communication fabric. The communication arrangement establishes an expanded address that provides a quantity of port identifiers to a host greater than indicated by a quantity of bits in a port field of the PCIe traffic, where the expanded address employs one or more bits of the PCIe traffic other than the port field. The communication arrangement detects a transfer among the PCIe traffic issued by the host having the expanded address corresponding to a destination. Based on the expanded address, the communication arrangement identifies routing information to route the transfer over the communication fabric to the destination.

Abstract: A storage card insertable into a host system is provided that includes a plurality of storage devices connectors. The storage card include slot offset features to offset a circuit board of the storage card from a host system slot alignment. This offset provides for storage device connector placement on both sides of the storage card. The storage card also can include a Peripheral Component Interconnect Express (PCIe) switch circuit configured to communicatively couple the PCIe signaling of the plurality of storage device connectors and PCIe signaling of a host connector of the storage card, where the PCIe switch circuit is configured to receive storage operations over the PCIe signaling of the host connector of the storage card and transfer the storage operations for delivery over the PCIe signaling of selected ones of the plurality of storage device connectors.

Abstract: Systems, methods, apparatuses, and software for computing systems are provided herein. In one example, a computing system includes a first processor configured to establish a network connection with a target system, and transfer to a second processor information describing the network connection comprising a network address and a network port. The computing system includes the second processor configured to identify when the first processor has failed, and responsively inherit the network connection with the target system based at least on the information describing the network connection and packet sequence information received from the target system to resume packet acknowledge or sequence counts established between the first processor and the target system.

Abstract: Disaggregated computing architectures, platforms, and systems are provided herein. In one example, a method of operating compute units is presented that includes forming compute units among a plurality of physical computing components coupled over a Peripheral Component Interconnect Express (PCIe) fabric configured to communicatively couple the plurality of physical computing components and isolate the compute unit using logical partitioning within the PCIe fabric. The method also includes initiating a software component deployed to at least associated CPUs within the compute units, reporting telemetry to the management processor related to operation of the compute unit, and emulating operation of at least one among an Ethernet and InfiniB and interface to an operating system of the associated CPU for transfer of communications comprising at least the telemetry to the management processor over the PCIe fabric.

Abstract: Rackmount Peripheral Component Interconnect Express (PCIe) switch assemblies are provided herein. One example PCIe switch assembly includes an enclosure that encases elements of the PCIe switch assembly, a first plurality of PCIe interconnect ports positioned on a front side of the PCIe switch assembly, and a second plurality of PCIe interconnect ports positioned on a rear side of the PCIe switch assembly. One or more redundancy cross-link ports are provided to handle failover traffic with at least another PCIe switch assembly. PCIe switch circuitry is communicatively coupled to the first plurality of PCIe interconnect ports and the second plurality of PCIe interconnect ports that form a cluster interconnect PCIe fabric. A control processor is configured to control operation of at least the PCIe switch circuitry and the one or more redundancy cross-link ports.

Abstract: Systems, methods, apparatuses, and software for data storage systems are provided herein. In one example, a data storage apparatus includes a processor configured to assign service levels in a queue for handling storage operations directed to one or more data storage drives. The processor can pre-allocate resources in the queue for selected ones of the service levels before ones of the storage operations associated with the selected ones of the service levels are received by the processor. The processor receives the storage operations, and based at least on the service levels, services the storage operations from the queue with the one or more data storage drives.

Abstract: Computing architectures, platforms, and systems are provided herein. In one example, system is provided. The system includes a first processor configured to initiate a communication arrangement between a first peripheral component interconnect express (PCIe) device and a second PCIe device. The communication arrangement is configured to detect transfers from the first PCIe device to one or more addresses corresponding to an address range of the second PCIe device, and redirect the transfers to the second PCIe device without passing the transfers through a second processor that initiates the transfers.

Abstract: Disaggregated computing architectures, platforms, and systems are provided herein. In one example, a method of operating a data processing system is provided. The method includes instructing a PCIe fabric communicatively coupling a plurality of physical computing components including PCIe devices and one or more PCIe switches to establish a first PCIe communication path between the management processor and a target PCIe device. The method also includes directing at least configuration data to the target PCIe device using the first PCIe communication path and instructing the PCIe fabric to remove the first PCIe communication path between the management processor and the target PCIe device. The method also includes instructing the PCIe fabric to establish a second PCIe communication path between a selected PCIe device and the target PCIe device configured according to the configuration data.

Abstract: Systems, methods, apparatuses, and software for data storage systems are provided herein. In one example, a data storage assembly is provided that includes a plurality of storage drives each comprising a PCIe host interface and solid state storage media. The data storage assembly includes a PCIe switch circuit coupled to the PCIe host interfaces of the storage drives and configured to receive storage operations issued by one or more host systems over a shared PCIe interface and transfer the storage operations for delivery to the storage drives over selected ones of the PCIe host interfaces. The data storage assembly includes a control processor configured to monitor usage statistics of the storage drives, and power control circuitry configured to selectively remove the power from ones of the storage drives based at least on the usage statistics of the storage drives.

Abstract: Disaggregated computing architectures, platforms, and systems are provided herein. In one example, a method includes receiving user input to establish a compute unit comprising a host processor and at least two graphics processing units (GPUs) having a peer-to-peer capability. The method also includes instructing a management element for a communication fabric to form the compute unit and communicatively couple the host processor and the at least two GPUs over the communication fabric. The method also includes instructing the management element to establish an isolation function to form the peer arrangement between the at least two GPUs in the communication fabric, where the isolation function isolates a first address domain associated with the at least two GPUs from at least a second address domain associated with the host processor by at least establishing synthetic devices representing the at least two GPUs in the second address domain.