Patents Assigned to LLC Suugakuya Honpo
  • Semiconductor chip designing method, non-transitory storage medium storing semiconductor chip designing program, semiconductor device production method, and arithmetic device
    Patent number: 10810340
    Abstract: At the boundary where the number of effective chips changes, at least three grid points of a chip grid intersect with the periphery of a wafer effective region, and a triangle connecting these three grid points together includes therein the wafer center. To design a semiconductor chip, this feature is used to determine, by an analytic process, candidate solutions including different numbers of effective chips. These candidate solutions are used to derive an advantageous solution.
    Type: Grant
    Filed: May 23, 2017
    Date of Patent: October 20, 2020
    Assignee: LLC SUUGAKUYA HONPO
    Inventor: Youzou Fukagawa
  • SEMICONDUCTOR CHIP DESIGNING METHOD, SEMICONDUCTOR CHIP DESIGNING PROGRAM, SEMICONDUCTOR DEVICE PRODUCTION METHOD, AND ARITHMETIC DEVICE
    Publication number: 20200175218
    Abstract: At the boundary where the number of effective chips changes, at least three grid points of a chip grid intersect with the periphery of a wafer effective region, and a triangle connecting these three grid points together includes therein the wafer center. To design a semiconductor chip, this feature is used to determine, by an analytic process, candidate solutions including different numbers of effective chips. These candidate solutions are used to derive an advantageous solution.
    Type: Application
    Filed: May 23, 2017
    Publication date: June 4, 2020
    Applicant: LLC Suugakuya Honpo
    Inventor: Youzou FUKAGAWA