Abstract: The disclosure generally relates to an enhanced positioning system and method using a combination or hybrid filter. In one embodiment, Time-Of-Flight (ToF) measurements are used to determine an approximate location for a mobile device in relationship to one or more Access Points. The ToF combined with known and unknown variables are then processed through a hybrid filter system to determine location of the mobile device. The hybrid filter system may include a Kalman Filter (KF) for processing linear models and generally Gaussian noise distribution. The KF assumes that the state probability of mobile device location is Gaussian. Such variables include, for example, WiFi ToF bias. The hybrid filter system may include a Bayesian Filter (BF) for processing variables having non-Gaussian noise distribution and non-linear models. Such variables include, for example, the coordinates of the mobile device. A probability determination from each of the KF and BF is then applied to estimate the mobile device location.

Abstract: An apparatus of an aspect includes a plurality of cores and shared core extension logic coupled with each of the plurality of cores. The shared core extension logic has shared data processing logic that is shared by each of the plurality of cores. Instruction execution logic, for each of the cores, in response to a shared core extension call instruction, is to call the shared core extension logic. The call is to have data processing performed by the shared data processing logic on behalf of a corresponding core. Other apparatus, methods, and systems are also disclosed.

Abstract: A method of an aspect includes running a plurality of threads on a plurality of thread processors. Memory accesses, of a thread of the plurality that is running on a first thread processor of the plurality, are monitored to both a first memory through a first memory controller and a second memory through a second memory controller. A second thread processor of the plurality is selected for a thread based on the monitoring of the memory accesses of the thread to both the first memory and the second memory. Installation of the thread, for which the second thread processor was selected, is initiated on the second thread processor. Other methods, apparatus, and systems are also disclosed.

Abstract: A device, system, and method are described. In one embodiment, the device includes a latch. The latch at different times is located in at least a rest position and a non-rest position. The latch receiving a manipulation force to move the latch from the rest position to the non-rest position. The latch is capable of delaying its return to the rest position after a period of time.

Abstract: Apparatus and methods for rack level pre-installed interconnect for enabling cableless server, storage, and networking deployment. Plastic cable waveguides are configured to couple millimeter-wave radio frequency (RF) signals between two or more Extremely High Frequency (EHF) transceiver chips, thus supporting millimeter-wave wireless communication links enabling components in the separate chassis to communicate without requiring wire or optical cables between the chassis. Various configurations are disclosed, including multiple configurations for server chassis, storage chassis and arrays, and network/switch chassis. A plurality of plastic cable waveguide may be coupled to applicable support/mounting members, which in turn are mounted to a rack and/or top-of-rack switches. This enables the plastic cable waveguides to be pre-installed at the rack level, and further enables racks to be installed and replaced without requiring further cabling for the supported communication links.

Abstract: Method, apparatus, and program means for performing a conversion. In one embodiment, a disclosed apparatus includes a destination storage location corresponding to a first architectural register. A functional unit operates responsive to a control signal, to convert a first packed first format value selected from a set of packed first format values into a plurality of second format values. Each of the first format values has a plurality of sub elements having a first number of bits The second format values have a greater number of bits. The functional unit stores the plurality of second format values into an architectural register.

Abstract: A method includes receiving a packed data instruction indicating a first narrower source packed data operand and a narrower destination operand. The instruction is mapped to a masked packed data operation indicating a first wider source packed data operand that is wider than and includes the first narrower source operand, and indicating a wider destination operand that is wider than and includes the narrower destination operand. A packed data operation mask is generated that includes a mask element for each corresponding result data element of a packed data result to be stored by the masked packed data operation. All mask elements that correspond to result data elements to be stored by the masked operation that would not be stored by the packed data instruction are masking out. The masked operation is performed using the packed data operation mask. The packed data result is stored in the wider destination operand.

Abstract: Method, apparatus, and program means for performing a conversion. In one embodiment, a disclosed apparatus includes a destination storage location corresponding to a first architectural register. A functional unit operates responsive to a control signal, to convert a first packed first format value selected from a set of packed first format values into a plurality of second format values. Each of the first format values has a plurality of sub elements having a first number of bits The second format values have a greater number of bits. The functional unit stores the plurality of second format values into an architectural register.

Abstract: Method, apparatus, and program means for performing a conversion. In one embodiment, a disclosed apparatus includes a destination storage location corresponding to a first architectural register. A functional unit operates responsive to a control signal, to convert a first packed first format value selected from a set of packed first format values into a plurality of second format values. Each of the first format values has a plurality of sub elements having a first number of bits The second format values have a greater number of bits. The functional unit stores the plurality of second format values into an architectural register.

Abstract: Method, apparatus, and program means for performing a conversion. In one embodiment, a disclosed apparatus includes a destination storage location corresponding to a first architectural register. A functional unit operates responsive to a control signal, to convert a first packed first format value selected from a set of packed first format values into a plurality of second format values. Each of the first format values has a plurality of sub elements having a first number of bits The second format values have a greater number of bits. The functional unit stores the plurality of second format values into an architectural register.

Abstract: A processor of an aspect includes a plurality of packed data registers, and a decode unit to decode an instruction. The instruction is to indicate one or more source packed data operands. The one or more source packed data operands are to have four 32-bit results of four prior SM4 cryptographic rounds, and four 32-bit values. The processor also includes an execution unit coupled with the decode unit and the plurality of the packed data registers. The execution unit, in response to the instruction, is to store four 32-bit results of four immediately subsequent and sequential SM4 cryptographic rounds in a destination storage location that is to be indicated by the instruction.

Abstract: Methods for performing power management of InfiniBand (IB) switches and apparatus and software configured to implement the methods. Power management datagrams (MADs) are used to inform IB switches that host servers connected to the IB switch's ports are to transition to a reduced-power or offline state or have returned to a normal operating state. A subnet management agent (SMA) on the IB switch receives the power MADs from the host servers and tracks each server's operating state. In response to power down MADs, the SMA coordinates power reduction of the switch's ports and other switch circuitry. For switches with multi-port IB interfaces, a multi-port interface is caused to enter a reduced-power state when all of its ports are connected to host servers that are idle or offline. Additionally, when all of a switch's ports are connected to idle or offline servers the SMA may put the switch's core switch logic into a reduced-power state.

Abstract: Disclosed methods support dynamic adjustment of graphics processing unit (GPU) frequency. According to one embodiment, a program comprises workload to execute, at least in part, on a GPU of a data processing system. A predetermined memory/compute ratio for the program is automatically retrieved, in response to the program being called for execution. The memory/compute ratio represents a ratio of memory accesses within the program, relative to compute operations within the program. In addition, a frequency of the GPU is automatically adjusted, based on the predetermined memory/compute ratio for the program. For instance, the GPU may be set to a relatively low frequency if the predetermined memory/compute ratio is relatively high, or to a relatively high frequency if the predetermined ratio is relatively low. After the frequency of the GPU is automatically adjusted, the program may execute, at least in part, on the GPU. Other embodiments are described and claimed.

Abstract: A method of an aspect includes receiving a floating point scaling instruction. The floating point scaling instruction indicates a first source including one or more floating point data elements, a second source including one or more corresponding floating point data elements, and a destination. A result is stored in the destination in response to the floating point scaling instruction. The result includes one or more corresponding result floating point data elements each including a corresponding floating point data element of the second source multiplied by a base of the one or more floating point data elements of the first source raised to a power of an integer representative of the corresponding floating point data element of the first source. Other methods, apparatus, systems, and instructions are disclosed.

Abstract: The disclosure relates to automatic calibration for cross devices in Wi-Fi fingerprint based areas. In an exemplary embodiment, an online device scans and obtains multiple signal strength value (RSSIoi) from local access points. The online device may access a fingerprint database and obtain a set of fingerprints. Each fingerprint includes a known location, a set of RSSI values (RSSIfi) and optionally a device/model name. For each fingerprint, the online device: (1) calculates a fingerprint RSSI offset (fpOff) in real-time; (2) applies the fingerprint RSSI offset (fpOff) to the fingerprint RSSI values to determine adjusted fingerprint values. Then the online device identifies fingerprints with minimum Euclidean distance and uses their RSSI offset (fpOff) value to determine a device RSSI offset value. The device offset value can be used to calibrate the online device and to provide accurate location information.

Abstract: A control mechanism and method for a hybrid hinge for electronic devices are disclosed. A particular embodiment includes: a hybrid hinge for an electronic device, the hybrid hinge comprising: a pivot; and an auxiliary component including one or more electro-magnetic or electro-mechanical devices and a variable electrical power source, the one or more electro-magnetic or electro-mechanical devices being configured to apply a variable degree of torque force to the pivot based on a degree of electrical power supplied by the electrical power source.

Abstract: Method, apparatus, and program means for shuffling data. The method of one embodiment comprises receiving a first operand having a set of L data elements and a second operand having a set of L control elements. For each control element, data from a first operand data element designated by the individual control element is shuffled to an associated resultant data element position if its flush to zero field is not set and a zero is placed into the associated resultant data element position if its flush to zero field is not set.

Abstract: A system and method for data transmission and power supply capability over an audio jack for mobile devices are disclosed. A particular embodiment includes: a peripheral device including an energy storage component, a microphone using a microphone bias voltage, and a select switch configured to provide a first switch position wherein charging of the energy storage component using the microphone bias voltage via the microphone conductor is enabled, the select switch being configured provide a second switch position wherein charging of the energy storage component using the microphone bias voltage via the microphone conductor is disabled; and a mobile device and an application (app) executable in the mobile device to produce a switching tone on the audio signal conductor of the audio jack, the switching tone causing the select switch to transition to the first switch position or the second switch position.

Abstract: Method, apparatus, and systems for detecting lane errors and removing errant lanes in multi-lane links. Data comprising link packets is split into a plurality of bitstreams and transmitted over respective lanes of a multi-lane link in parallel. The bitstream data is received at multiple receive lanes of a receiver port and processed to reassemble link packets and to calculate a CRC over the data received on each lane. The link packets include a transmitted CRC that is compared to a received CRC to detect link packet errors. Upon detection of a link packet error, per-lane or per transfer group CRC values are stored, and a retry request is issued to retransmit the bad packet. In conjunction with receipt of the retransmitted packet, per-lane or per transfer group CRC values are recalculated over the received data and compared with the stored per-lane or per transfer group CRC values to detect the lane causing the link packet error.

Abstract: Methods, apparatus, and systems for implementing a link layer retry protocol utilizing implicit ACKnowledgements (ACKs). Peer link interfaces are configured to facilitate confirmed error-free delivery of link-layer packets through use of implicit ACKs, while also providing retransmission of packets for which errors are detected and guaranteeing the link control data is either successfully received or data transfer over the link is prevented. In conjunction with transmitting packets, reliable packets are copied into sequential slots in a replay buffer. Each link interface tracks the slot at which each reliable packet is buffered, and in response to detection of an error, a retry request is sent to the transmit-side to retransmit the errant packet. The previously buffered copy of the errant packet is retrieved from the replay buffer and retransmitted.