Abstract: Apparatus for high speed generation of digital exponential functions in connection with a computer processor. The invention employs compact look-up tables accessed by look-up techniques and value interpolation to determine values not found in the tables. In specific embodiments, specific techniques are employed for table generation and value interpolation to attain results at desired levels of speed, precision, economy and reliability. Applications include alternatives to conventional hardware multipliers and numerical processors. Individual embodiments may be realized either directly in hardware or software. Multiple embodiments may be realized as software or hardware function libraries. Coupled multiple embodiments may be realized as general purpose hardware or software mathematical processors.