Abstract: Slew rate of an LDO power regulator is enhanced using a bypass device outside of a control loop of the LDO power regulator. The bypass device provides current to a load in parallel to the LDO power regulator in response to transient events. The bypass device includes digital control circuitry for controlling provision of current to the load. In some embodiments the digital control circuitry provides logic outputs using threshold levels based on desired regulated output voltages of the LDO power regulator.

Abstract: The present disclosure discloses a computer case that includes a case body with a first side wall and a second side wall. The first side wall and the second side wall are opposite each other; the first side wall includes a first cooling position and the second side wall includes a second cooling position. A ratio of cooling area of ventilation and cooling devices mounted at the first and second cooling positions is not less than 2:3, or a ratio of projected area of the ventilation and cooling devices mounted at the second and first cooling positions is not less than 2:3. A high-efficiency through-type airflow path may be formed inside the case body, when a guiding airflow directions of the ventilation and cooling devices mounted at the first and second cooling positions are provided to be consistent with each other.

Abstract: Disclosed is an industrial Internet of Things (IIoT) energy management system and method based on a management cloud platform. The IIoT energy management system comprises the management cloud platform and an IIoT system. The IIoT system includes an IIoT management platform, an IIoT sensor network platform, and an IIoT perceptual control platform.

Abstract: A method for operating a storage device according to some example embodiments may include monitoring a power supply voltage provided by an external host device; detecting an error of the power supply voltage; generating self-monitoring data of the power supply voltage, and requesting real-time state information to the external host device, based on detection of the error of the power supply voltage; receiving the real-time state information from the external host device; generating result data for indicating whether the error of the power supply voltage is caused by the storage device based on the self-monitoring data and the real-time state information; and transmitting the result data to the external host device.

Abstract: The present application relates to a control right handover method and apparatus for power management, a device, and a storage medium. The method includes: adding power management handover option hardware-controlled performance states (HWP) in a basic input output system (BIOS) power management interface; setting an option value corresponding to the power management handover option HWP as Native Mode; saving Native Mode to an intermediate struct; and modifying bits of target registers in a central processing unit (CPU) according to the intermediate struct, whereby a control right for power management is handed over from a BIOS to an operating system (OS), and the OS acquires the control right for power management.

Abstract: The present disclosure provides a complex for synthesizing one or more nucleotide strands of interest and a method for synthesizing one or more nucleotide strands of interest. The complex for synthesizing one or more nucleotide strands of interest includes nucleotide fragments and a double-stranded oligonucleotide ligase, wherein the nucleotide fragments are hybridized to form a double-stranded oligonucleotide; the double-stranded oligonucleotide ligase is a ligase capable of sealing nicks in the double-stranded oligonucleotide; and at least one strand of the double-stranded oligonucleotide is a nucleotide strand of interest; and the nucleotide fragments include a first fragment and a second fragment, the first fragment contains a 5?-phosphate group, and the first fragment is synthesized in a 3?- to 5?-direction; and the second fragment contains a 3?-hydroxyl group, and the second fragment is synthesized in a 5?- to 3?-direction.

Abstract: An evaluation device includes a storage device and a processor that is connected to the storage device. The storage device stores a test program in which one or more commands are described. The one or more commands include a first command that simulates a user operation on a device with multiple screens. The first command causes the device to perform an action responding to the user operation. The processor determines, from among the multiple screens, a relevant screen that is relevant to a command in an execution phase among all commands described in the test program. The processor executes functional testing of the device by sequentially executing all the commands. The processor captures a screen display on each of the multiple screens at a frame rate based on a result of the determination of the relevant screen.

Abstract: A calibration mark apparatus includes a support having at least one wall with at least one calibration pattern on the least one wall and at least one attachment portion extending from the least one wall. The attachment portion may be a flap extending from at least one wall for attaching the support to a surface or a net. The support may be a three-dimensional (3D) structure. The calibration mark apparatus may have walls that are foldable along a common edge into a single plane. The calibration mark apparatus may have a base connecting the walls including raised tab portions arranged to fit into slots in the flap. The flap may include openings for attaching multiple supports together by a rope that is arranged to feed through the openings. The calibration mark apparatus may include a bracket to mount the support to a surface or a net by clips.

Abstract: This application relates to communicating information between communication devices. A channel coding method is disclosed. A communication device obtains an input sequence of K bits. The communication device encodes the input sequence using a low density parity check (LDPC) matrix H, to obtain an encoded sequence. The LDPC matrix His determined according to a base matrix and a lifting factor Z. The base matrix includes m rows and n columns, m is greater than or equal to 5, and n is greater than or equal to 27. The lifting factor Z satisfies a relationship of 22*Z?K. According to the encoding method provided in the embodiments, information bit sequences of a plurality of lengths can be encoded for transmission between the communication devices.

Abstract: A radio frequency module includes amplifiers that form an amplifier circuit of differential amplification type, a switch that has a common terminal and selection terminals, a switch that has a common terminal and selection terminals, a filter that has balanced terminals and an unbalanced terminal and that has a passband including a first band, and a filter that has balanced terminals and an unbalanced terminal and that has a passband including a second band.

Abstract: Disclosed are a backlight device for a display that provides a backlight for displaying an image and a current control integrated circuit thereof. According to the backlight device and the current control integrated circuit thereof, a driving current can be controlled so as to allow light emitting blocks to maintain light emission for one frame or more, and the luminance of a backlight can be uniformly and precisely controlled in an entire luminance change area.

Abstract: An apparatus for injecting an electrolyte into a can of which an upper side is opened and in which a beading part is molded to be spaced a predetermined distance from the uppermost end and protrude to the inside along a circumference. The apparatus for injecting the electrolyte may include: a nozzle configured to inject the electrolyte into the can; and a sealing member that is provided in the nozzle and is in close contact with the beading part when the nozzle injects the electrolyte into the can. A sealing groove that is in close contact with the beading part and has a concavely recessed shape may be provided in the sealing member.

Abstract: A manufacturing method of light-emitting diode substrate and a display device are disclosed. The manufacturing method of the light-emitting diode substrate includes: obtaining an epitaxial layer group of M light-emitting diode chips grown on a substrate; transferring N epitaxial layer groups on N substrates onto a transition carrier substrate, the N epitaxial layer groups on the N substrates being densely arranged on the transition carrier substrate; and transferring at least part of light-emitting diode chips corresponding to the N epitaxial layer groups on the transition carrier substrate onto a driving substrate; the light-emitting diode chips corresponding to the N epitaxial layer groups on the N substrates are configured to emit light of a same color; M is a positive integer greater than or equal to 2, and N is a positive integer greater than or equal to 2.

Abstract: A circuit board including an insulating layer burying at least one wiring layer and at least one via layer, and having first and second surfaces facing each other in a first direction, and a pad including a protruding portion protruding from the first surface of the insulating layer and an embedded portion embedded in the insulating layer, and electrically connected to the wiring layer. The protruding portion includes a first portion positioned at the outermost part along the first direction and parallel to a second direction parallel to the first surface, and a second portion connected to the embedded portion and adjacent to the first surface, and in the width along the second direction, the width of the first portion is different from the width of the second portion.

Abstract: This application provides a communication method, so that sidelink signaling can be used for transmission of AS configuration information. Specifically, a first terminal device obtains a source identifier allocated to groupcast communication by a second terminal device, where the groupcast communication is communication for a target group, and the first terminal device and the second terminal device belong to the target group. A V2X layer of the first terminal device generates first sidelink signaling, and sends the first sidelink signaling, a first identifier, and a group identifier to an AS of the first terminal device, where the first identifier is a source identifier allocated to the groupcast communication by the first terminal device, and the group identifier is used to identify the target group. The AS sends the first sidelink signaling by using the first identifier as a source identifier and using the group identifier as a destination identifier.

Abstract: A method, an apparatus, and a circuit for compensating a neural network based on a computing-in-memory circuit are provided and relate to the field of computer technologies, to compensate for a computation error generated when the computing-in-memory circuit performs neural network computation. The method includes: obtaining configuration information, where the configuration information indicates at least one to-be-compensated multiply-accumulate layer in a plurality of multiply-accumulate layers of the neural network and at least one compensation circuit corresponding to the at least one multiply-accumulate layer, and the at least one compensation circuit is configured to compensate for a computation error of the at least one multiply-accumulate layer; and compensating, in a process in which the computing-in-memory circuit runs the neural network, a computation result of the at least one multiply-accumulate layer through the at least one compensation circuit indicated by the configuration information.

Abstract: A wire harness exterior body and a wire harness with the exterior body, with which it is possible to appropriately restrict the route of the wire harness, and to eliminate dead space and reduce space in a vehicle, etc., in which the wire harness is used. This wire harness exterior body has a wire bundle in which a plurality of electric wires are bundled, the exterior body being formed from at least one flat member including a resin material, and contacting and supporting one surface of a wire aggregate including the wire bundle constituting a wire harness, or a plurality of divided wire bundles that are further branched from the wire bundle and extended. The exterior body having flat parts that restrict the route of the wire harness.

Abstract: A sample refrigeration storage device and a sample flow-line analysis system are provided. The sample refrigeration storage device includes: a refrigeration storage area including a storage area frame, a refrigeration placement rack and a first refrigeration mechanism; a refrigeration operation area including an operation area frame, a sample sorting mechanism, a sample rack-loading mechanism and a second refrigeration mechanism, the operation area frame being in communication with the storage area frame to form a closed cavity, and the sample sorting mechanism and the sample rack-loading mechanism cooperating to offload samples from the refrigeration placement rack through an access opening, and to load samples onto the refrigeration placement rack through the access opening; a sample transport track; and a central control system.

Abstract: A semiconductor device includes at least one semiconductor chip that includes a semiconductor substrate having a front surface and a rear surface, a device portion on the front surface, a first connection line on the device portion, a first pad portion on the first connection line and including a plurality of first pads, a second connection line on the rear surface and including a power distribution network, and a second pad portion on the second connection line and including a plurality of second pads. At least a portion of the second pads may be connected to the power management network to apply power supply voltage to the device portion through the power distribution network.

Abstract: The power supply system related to the present invention includes plural power sources for supplying power to a single load in a vehicle, plural power supply paths for connecting the single load and each of the plural power sources, and a current adjustment unit for adjusting current flowing through at least one of the plural power supply paths, and the current adjustment unit compares state quantities of electrical states of each of the power supply paths, and, when a difference between the state quantities meets prescribed conditions, adjusts current flowing through the power supply paths so as to reduce the difference between the state quantities.