Abstract: The smoothness of refractory dielectric bodies, particularly silica sol-gel bodies, is substantially improved by a relatively straightforward treatment. In particular, the surface of the body is treated with a plasma fireball, such as induced by a plasma torch. The treatment is able to reduce the roughness, as measured by RA, in overcladding tubes formed by a sol-gel process by at least a factor of 2, typically at least a factor of 5. It is also possible to improve the smoothness of silica tubes that are drawn from a billet. Typically, the process reduces the roughness of silica bodies to an RA of about 1 microinch or less.

Abstract: A communication plug that generates crosstalk that complements the compensating crosstalk in a legacy jack or connector. The communication plug includes a dielectric carrier on which a plurality of electrical conductors are disposed. Each conductor is configured to wrap around a first end of the carrier thereby forming a series of adjacent inductive loops. Complementary crosstalk is generated between the conductors as a result of the fields created from current flow through the inductive loops and can be fixed to a desired level by modifying certain engineerable parameters. The inductive loops are positioned in the nose or front region of the plug where the conductors engage the jack spring wires or terminals thus minimizing the propagation delay between the crosstalk signals generated in the plug and the crosstalk signals generated in the jack or connector.

Abstract: A phase-locked loop (PLL) has a master circuit configured to a slave circuit. The slave circuit has a phase detector, a charge pump, a loop filter, and a voltage-controlled oscillator configured to operate as a closed-loop PLL. The master circuit has a phase detector and a charge pump that are similar to the corresponding components in the slave circuit. The master circuit is configured to receive two input signals with zero phase offset. As such, any net current charge generated by the master charge pump will be indicative of mismatch within the master phase detector and charge pump, and therefore, by analogy, indicative of mismatch within the slave phase detector and charge pump, as well. A voltage signal generated by the master circuit is applied to control the generation of currents by the slave charge pump in such a way as to compensate for static phase offset that would otherwise exist in the slave circuit.

Abstract: Disclosed is a method for fabricating devices so that several devices at a time can be tested and sorted. The devices are placed in a carrier so that each device occupies a discrete position. The carrier includes an identification marker, and each device is identified by its position in the carrier. The carrier is sent to multiple assembly and/or testing stations, and data for each device is collected and stored in a central data base according to its position in the carrier. Each device may then be sorted according to the collected data and its position in the carrier.

Abstract: Diffusion of ion-implanted dopant is controlled by incorporating electrically inactive impurity in a semiconductor layer by at least one crystal growth technique.

Abstract: An optical waveguide amplifier is formed to include an adiabatic region disposed between an input single mode waveguide and a large area, multimode gain region. The utilization of the adiabatic region allows for a single mode signal to be supported and provides for a larger gain area to be formed, thus providing a larger gain and higher output power than conventional prior art waveguide amplifier arrangements.

Abstract: In an optically amplified multi-wavelength optical fiber communication system, deleterious effects due to channel addition/removal can be reduced or avoided if the optical amplifiers are "overpumped", that is to say, the system is selected such that at least 70%, preferably 90% or more, of the pump power that is introduced into the amplifier fiber is unabsorbed in the amplifier fiber.

Abstract: The specification describes a technique for testing packaged or unpackaged IC devices in which the devices are aligned and placed onto a tacky layer of an anisotropic conductive medium (ACM). The tacky ACM layer provides the necessary electrical contact to the IC device while under test, and also preserves the alignment of the IC device during movement between stations. When electrical testing of the IC device is completed the IC device packages are lifted free of the tacky layer and permanently bonded to an interconnection substrate. In one embodiment the test interconnection substrate is a replica of the permanent interconnection substrate. In another mode of practicing the invention the test interconnection substrate is the actual permanent interconnection substrate, and the IC device is bonded in situ after electrical testing.

Abstract: A lithographic process for semiconductor device fabrication is disclosed. In the process a patterned mask having a multilayer film formed on a substrate is illuminated by extreme ultraviolet (EUV) radiation and the radiation reflected from the pattern mask is directed onto a layer of energy sensitive material formed on a substrate. The image of the pattern on the mask is thus introduced into the energy sensitive material. The image is then developed and transferred into the underlying substrate. The multilayer film is inspected for defects by applying a layer of energy-sensitive film (called the inspection film) in proximity to the multilayer film and exposing the energy-sensitive material to EUV radiation. The thickness of the multilayer film is such that a portion of the EUV radiation is transmitted through the inspection film, reflected from the multilayer film and back into the inspection film.

Abstract: For use in a boost converter having a boost inductor coupled between an input and an output of the boost converter and an output capacitor coupled between rails of the output, an energy storage circuit for, and method of, extending a holdup time of the boost converter.

Abstract: A programmable logic device (PLD), such as a field programmable gate array (FPGA), has a programmable clock manager (PCM) that converts an input clock into at least one output clock and the PCM can perform one or more delay-locked loop (DLL) functions. In one embodiment, the DLL functions include clock delay, duty-cycle adjustment, and clock doubling, where duty-cycle adjustment can optionally be applied independently to the doubled clock cycles.

Abstract: The specification describes a spatial autocorrelation technique for measuring ultrafine linewidths of the order of tens of nanometers and less. Two beams of actinic radiation are used to draw parallel lines in a resist material. Each beam is adjusted to deliver a dose below the threshold for printing a feature, but when combined the dose is sufficient to print a line feature. During exposure the separation between beams is changed in controlled spatial steps until the beams cross one another. During some of the steps at least a portion of the beams will be coincident thus producing printable features. The resist is developed to print the features where the beams are coincident. The lines are below the resolving power of an optical microscope but their presence is discernible. The width of the line is determined from the number of lines printed and the size of the spatial steps.

Abstract: An unsigned integer comparator for use when comparing an n-bit received signal (such as an address) with an n-bit known signal ("comparison address"). The first stage of the comparator may be configured in advance, since the values of both a "comparison signal" and a "select signal" are known a priori. When the "current signal" arrives, the bits of this signal are then compared against the associated bits of the comparison signal. Subsequent stages of the comparator perform comparison operations of increasing length, dependent upon the outcome of the previous stage (i.e., a first set of 2-bit comparisons, then 4-bit, 8-bit, etc.), until the entire n-bit integers are ultimately compared and a final output is generated.

Abstract: For use with a three-phase boost converter having a primary stage with a primary rectifier and a primary boost switch coupled between an input and output of the three-phase boost converter, an auxiliary stage, method of reducing input current total harmonic distortion (THD) at the input of the three-phase boost converter, and a three-phase boost converter employing the auxiliary stage and method. In one embodiment, the auxiliary stage includes first, second and third auxiliary boost inductors coupled to corresponding phases of the input. The auxiliary stage also includes an auxiliary boost switch, interposed between the first, second and third auxiliary boost inductors and the output, that conducts to draw corresponding phase currents through the first, second and third auxiliary boost inductors thereby reducing input current THD at the input of the three-phase boost converter.

Abstract: An object-oriented dialogue manager is provided which allows a computer system or other dialogue processing system to conduct an efficient dialogue with a human user. In an illustrative embodiment, the dialogue manager processes a set of frames characterizing a subject of the dialogue, where each frame includes one or more properties that describe an object which may be referenced during the dialogue. A weight is assigned to each of the properties represented by the set of frames, such that the assigned weights indicate the relative importance of the corresponding properties. The dialogue manager utilizes the weights to determine which of a number of possible responses the system should generate based on a given user input received during the dialogue. The dialogue manager serves as an interface between the user and an application which is ruining on the system and defines the set of frames.

Abstract: A switch monitoring system including at least one bus having a plurality of switching ports, wherein a multiplicity of data portions travel over the bus, each of the data portions having at least one destination. The system also includes a plurality of workstations connected to the plurality of switching ports, and a data collection device operative to collect at least one of the data portions from the at least one bus which data portion is being transmitted along the at least one bus to at least one destination including at least one destination other than the data collection device.

Abstract: An apparatus for performance improvement of a digital wireless receiver comprises a processing circuit for processing a plurality of received signals and providing a processed signal, wherein a plurality of weights is applied to the plurality of received signals producing a plurality of weighted received signals. The plurality of weighted received signals are combined to provide the processed signal. A weight generation circuit generates the plurality of weights, wherein weights are generated so as to solve a minimization problem that penalizes excessive time variability in the weights.

Abstract: A protective shutter assembly for a fan of a forced air cooling system includes lightweight shutter members mounted for pivoting motion about vertical axes. When the fan is operative, its shutter members are pivoted in a first direction to expose the fan and allow air to be exhausted therefrom. When a fan is inoperative, its shutter members pivot in a second direction toward the fan and overlap to prevent air from being reversely drawn into the fan.

Abstract: An apparatus is used to inspect an assembled circuit board having a device assembled to the circuit board by a ball grid array (BGA). The BGA includes a plurality of rows of solder connections. The apparatus has a source of light, which may be a laser. A first deflector is positioned to direct the light into a first side of the BGA, between two adjacent rows of solder connections in the BGA. A second deflector directs any light emitted from a second side of the BGA opposite the first side onto a target. The deflectors may be prisms, mirrors, or optical fibers. The target may be a viewing surface (such as a wall or screen) or a light detector, such as a camera, frame grabber, or photoelectric device. The absence of light on the target while the light is directed into the first side of the BGA indicates the presence of a solder bridge in the BGA.

Abstract: A VCSEL comprises a pair of multi-layered mirrors forming an optical cavity resonator having its axis perpendicular to the layers of the mirrors, an active region disposed within the resonator, and a current guide for directing pumping current through an aperture to generate stimulated emission of radiation which propagates along the resonator axis. A portion of the radiation forms an output signal which emerges through at least one of the mirrors. The current guide includes a lateral injection structure disposed between one of the mirrors and the current aperture. The lateral injection structure comprises at least one relatively thin, highly doped semiconductor layer, each of the highly doped layer(s) being located at a node of the standing wave of the intracavity radiation, at least one lower doped semiconductor layer disposed adjacent each of the highly doped layers (e.g.