Abstract: An adder using a leading zero/one detector (LZD) circuit and method of use determine an exact normalization shift with fewer logic levels and number of gates, resulting in saving considerable execution time to improve not only the timing as well as to reduce the size of the logic implementing the adder. In addition, a parallel method to locate the most significant digit is disclosed. Such an LZD circuit and method may be incorporated in an integrated circuit, and the LZD circuit includes a propagation value generator for generating a propagation value from input signals representing operands; and a location value generator for generating the location value from the generated propagation value.

Abstract: For use in a power system having a power train, a rectifier having an input and an output and a method of controlling the rectifier. The rectifier comprises: (1) switching circuitry coupled between the input and the output, the switching circuitry adapted to operate in selected one of (a) a bidirectional mode of operation and (b) an unidirectional mode of operation to rectify substantially alternating current at the input to produce substantially direct current at the output; and (2) control circuitry coupled to a control input of the switching circuitry, the control circuitry capable of sensing a characteristic of the power system and transitioning the switching circuitry between the bidirectional mode and the unidirectional mode as a function of the characteristic thereby to prevent substantial reverse power flow through the rectifier.

Abstract: An omnidirectional or panoramic viewer/projector uses a single camera and a mirror with a curved surface. The curved mirror provides a single virtual optical center or viewpoint.

Abstract: Apparatus for implementing the application of duo-binary signal encoding in high-power, high-speed transmission systems which may be employed to mitigate the problem of stimulated Brillouin scattering. A dual-drive Mach-Zehnder interferometer modulator is used, with data being applied to both modulation inputs. The voltage difference between the two modulation inputs is between -V.sub..pi. and + V.sub..pi.. In one embodiment, the data signal is applied to one input, and the same signal, delayed by one bit, is applied to the second input, and the modulator is biased so as to have minimum throughput when both inputs are identical. In the second embodiment, the data signal is applied to one input and the complementary data-bar signal, delayed one bit, is applied to the second input, with the modulator biased to minimum throughput when both inputs are identical. This novel implementation has been verified experimentally showing a power penalty of less than 1 dB relative to a conventional binary signal.

Abstract: In accordance with the present invention, circuits are disclosed for use in implementing higher order sigma delta analog to digital conversion of narrowband signals with cascaded lower order circuit networks. The lower order circuit networks employ resonator circuits utilizing unit delay functional blocks to implement a specific transfer function. The unit delays are implemented utilizing sample and hold circuits operated by controlled switching of the circuit elements. In one embodiment, the resonator circuit includes a first sample and hold circuit for implementing a unit delay of corresponding input signals where the output of the first sample and hold circuit is coupled into a feedback loop with one or more additional sample and hold circuits for implementing a dual cascaded unit delay. The delayed signals from the feedback loop are then summed with the input signals at the input of the first sample and hold circuit.

Abstract: A two-way wireless messaging system includes a messaging network and a two-way wireless messaging device which originates, receives and replies to messages having dynamic message components to and from the messaging network. The messaging network includes a plurality of stored messages and message destination addresses. The dynamic message components include optional components, user-defined selections, pre-defined variables and conditional components. The system also includes a plurality of intelligent servers located within the messaging network for receiving, routing, tracking and forwarding messages through the messaging network to intended message destination addresses.

Abstract: A system for, and method of, voltage positioning a regulator and a regulator employing the system or the method. The regulator has an input coupled to a switching network and an output coupled to a load. In one embodiment, the voltage positioning system, includes a current sensor, coupled to the output, that senses an output current of the regulator and generates a proportional voltage. The system further includes a voltage sensor, coupled to the load, that senses a load voltage and the proportional voltage. The system still further includes a controller, coupled to the voltage sensor, that generates a signal to control the switching network as a function of the load voltage and the proportional voltage.

Abstract: A system and method for controlling excessive charging of batteries in battery power plants and power systems. A system embodiment includes: a battery plant for supplying power to a load, and incorporates one or more of the following: a power supply, a battery string (with at least one battery), and a controller. The power supply(s) is used to charge a battery string(s) having at least one battery. The controller is coupled to the battery string(s) and the power supply(s). The controller is configured to: (1) sense whether the battery string is receiving an excess current independent of current to a load by comparing current flowing to the battery string to a preset current limit, (2) dynamically adjust the current limit to eliminate any excess current detected in the battery string if an excess current is detected, and (3) increase the current limit to charge the battery string when no excess current is detected.

Abstract: Disclosed is an electrical connection system including connecting blocks and patch cord connectors where the patch cords are directed toward, rather than away from, the connecting blocks. Troughs are included between adjacent rows of connecting blocks to accommodate the patch cords from the patch cord connectors connected to one of the rows.

Abstract: A compensation scheme for differential- or single-input transconductance amplifiers relies on an active feedback path with a resistive pole-splitting compensation circuit. The resistive compensation circuit causes pole-splitting of the two dominant poles, moving one pole to a slightly lower frequency and the other to a much higher frequency compared to the dominant poles of the uncompensated amplifier. A DC-blocking capacitor may also be placed in series with the resistor of the compensation circuit to allow for proper biasing of the circuit. By selecting appropriate values for the passive elements in the compensation circuit, the compensation scheme of the present invention can cause the amplifier to operate in a stable, linear manner over the same or even a larger bandwidth than an equivalent amplifier without compensation. The present invention does not suffer the problems of standard narrowbanding compensation schemes associated with high frequency cut-off.

Abstract: A method and circuit for timing and carrier recovery of a digital signal in broadband communications systems. The digital signal is sampled at a given rate and a first k number of successive samples are stored in a local memory bank. The next m-k samples are then ignored. The stored samples are then processed such that the timing and carrier are recovered therefrom within m clock cycles. In one method for processing the stored k samples, the samples are filtered and locked so that the timing and carrier can be recovered therefrom.

Abstract: For use in an automatic gain control that receives a digital signal from a digital circuit having a given dynamic range and develops therefrom a gain signal to be applied to a variable gain amplifier, an analyzing circuit for, and method of, determining a magnitude of the gain signal.

Abstract: A coin separation apparatus is positioned in a coin slot chute through which a deposited coin may fall. Electronic apparatus advantageously determines whether the falling coin is genuine or counterfeit. If the coin is determined to be genuine, the electronic apparatus activates a solenoid which unlocks a door to a coin box safe. The falling coin first strikes a vane of a hinged diverter door and the kinetic energy of the coin causes the diverter door to rotate on its hinge. The diverter door is spring-coupled to the door of the coin box safe which, if unlocked, is caused to open by the rotating diverter door, thereby permitting the coin to enter the coin box safe. If the electronic apparatus fails to detect that the falling coin is genuine, the solenoid is not activated and the coin box safe door remains locked. The falling coin strikes the vane of the diverter door causing it to rotate on its hinge and stretching the spring and allowing the coin to fall out of the chute.

Abstract: A wireless terminal is disclosed comprising a first electro-acoustic transducer for converting a first acoustic signal to an uplink signal; a wireless transmitter capable of transmitting the uplink signal to a base station; a wireless receiver capable of receiving a downlink signal from the base station; a terminal processor for conditionally adding a portion of the uplink signal to the downlink signal while a first parameter is set and not adding the portion of the uplink signal to the downlink signal while the first parameter is reset; and a second electro-acoustic transducer for converting the downlink signal to a second acoustic signal. Another embodiment is disclosed that reduces the sidetone level of the terminal based on the power level of the envelope of the acoustic signal input at the microphone.

Abstract: The present invention is directed to a lead frame in which the metal lead frame substrate is copper, copper alloy, or nickel alloy. The lead frame substrate is coated with a conformable nickel coating that is crack-resistant when the lead frame is bent to an angle of at least 82 degrees with a bend radius of about 150 .mu.m to about 300 .mu.m. Bending the lead frame in this manner causes surface deformations in the lead frame substrate. Cracks do not appear through the thickness of the conformable nickel coating of the present invention when the depth of the deformations that result from this bending do not exceed about 5 .mu.m.

Abstract: A method and system of utilizing a memory array device contained within an integrated circuit within the printer device is provided in which data bits are written in a row format, thereby filling an N.times.M memory array device and then read in a column format. An N.times.M memory array device is employed such as a 32.times.32 bit memory array. During the reading phase, data from a computer is read by the memory device in a parallel fashion so that data is written sequentially a row of memory cells, such as B0W0, B1W0, B2W0 . . . etc. Once the memory array is loaded up, the writing phase is accomplished by performing a parallel dump wherein all of the memory cells of the first column are read together such that a column of memory cells, such as B0W0 to B0W31 is read first, a column of memory cells, such as B1W0 to B1W31 is read second, a column of memory cells B2W0 to B2W31 is read third etc. The N.times.M memory array device is read in a column format instead of the standard row format.

Abstract: A clip assembly and method of attachment for a heat sink having a pin-fin array employing thermally conducting tape to secure the heat sink to a heat dissipating BGA component together with at least one clip assembly which is secured to the underside of the component at its edges.

Abstract: Gate oxides having different thicknesses are grown on a semiconductor layer by the process which comprises forming a semiconductor layer on a substrate, growing an oxide layer on the semiconductor layer, exposing a selected area of the oxide layer, amorphizing the semiconductor layer underlying the exposed oxide layer, removing the oxide layer to expose the semiconductor layer having both amorphized and non-amorphized regions and growing gate oxide on the amorphized and non-amorphized regions of the semiconductor layer. Gate oxide grown on the amorphized regions will be thicker than gate oxide grown on the non-amorphized regions.The process of the invention obviates the need for special integrated circuit manufacturing design modifications and can be utilized to fabricate a wide variety of devices, in particular, MOS-type devices.

Abstract: Connectors, such as 110-type patch plugs, are designed to reduce near-end crosstalk that is generated when the connector is mated to a corresponding receptacle, such as a 110-type connecting block. Connectors of the present invention employ a two-stage crosstalk compensation scheme in which a first stage induces a compensating crosstalk signal, having opposite polarity as the original crosstalk signal, while the second stage induces a counter-balancing crosstalk signal, having same polarity as the original crosstalk signal. The two-stage, counter-balanced crosstalk compensation scheme of the present invention takes into account both the magnitude of the original crosstalk signal as well as the phase differences between the original crosstalk signal and the compensating and counter-balancing crosstalk signals that result from the different locations along the signal path at which the crosstalk signals are induced.

Abstract: Using a server system in accordance with the invention, a user and his/her companions can share information on the World Wide Web (WWW). The server system allocates a memory space for storing information particular to the user. This user memory space is associated with the user's login identification (ID) provided to the server system during the user login. Web information obtained by the user from the server system, or a representation of such information, is stored in the user memory space. In sharing the web information, the user's companions need to log onto the server system separately using the user's login ID. The server system then provides the companions with the web information based on the information currently stored in the memory space associated with the user's login ID provided by the companions.