Abstract: Gold is useful for infrared polarization-insensitive mirrors on silica. However, gold does not adhere to bare silica. The adherence is enhanced by depositing an optically thin glue layer of Ni--P on a silica surface after sensitization of the surface and activation. The Ni--P layer has a thickness sufficient to enhance adherence of gold to the surface of silica, but insufficient to act as a barrier to the passage of infrared radiation to or from the gold layer. One measure of the Ni--P thickness is the absorbance of the glue layer of >0.008 at 550 nm (>0.003 at 850 nm) as measured by a spectrophotometer. A 100-150 nm thick gold layer, deposited on this adhesion layer, adheres well enough to pass the commonly used "Scotch tape adhesion test". The ability to make gold adhere to silica with very low optical loss is useful in fabrication of lightwave devices which require the use of reflecting surfaces, such as an optical fibers or waveguides.

Abstract: A method of forming low stack height transistors having controllable linewidth in an integrated circuit without channeling is disclosed. A disposable hardmask of doped glass is utilized to define the gate and subsequently protect the gate (and the underlying substrate) during ion implantation which forms the source and drains. An anti-reflective coating helps protect against reflective gate notching. A variety of silicided and non-silicided) structures may be formed.

Abstract: A battery rack for containing batteries and methods of operation and manufacture thereof. In one embodiment, the battery rack includes: (1) a plurality of shelf support members, (2) first and second shelves, coupled to the shelf support members to receive support therefrom, the first and second shelves having corresponding first and second pluralities of divider apertures therethrough, the first plurality of divider apertures substantially vertically-aligned with the second plurality of divider apertures and (3) a plurality of divider rods passing through corresponding vertically-aligned ones of the first and second pluralities of divider apertures to form dividers to divide the battery rack into battery compartments, the plurality of divider rods having a diameter less than that of the first and second pluralities of divider apertures to allow the plurality of divider rods to rotate and thereby present a low frictional resistance to movement of batteries within the battery compartments.

Abstract: Records stored in a database are reset on an as-accessed basis. A record in the database to receive new data is identified when new data arrives to be incorporated with existing data in a given field. A next reset date stored in the record is read and compared with the current date. If the current date is later than the next reset date, the existing data in the field is replaced with a predetermined default value prior to incorporating or incrementing the new data in the field. Additionally, another next reset date is calculated and substituted for the previous next reset date in the record.

Abstract: An apparatus is provided for adding a dither signal to an optical carrier modulated with an information signal. The apparatus includes a dithering element having an input and an output in series with an optical carrier modulated with an information signal. A differential element having an inverting input, a non-inverting input, and an output is coupled to the input of the dithering element. A signal generator, which is provided for producing a desired dither signal to be added to the modulated optical carrier, is coupled to the non-inverting input of the differential element. A feedback element produces a signal related to the output of the dithering element and couples the signal related to the output of the dithering element to the inverting input of the differential element.

Abstract: A thermally activated silica optical circuit switch that uses light from a light source, such as a laser, to heat various regions of the switch to produce a switching function. In one embodiment, the switch includes silica glass formed on a substrate, such as a silicon substrate, and at least one input waveguide and one output waveguide formed within the silica glass. A light source is then used to generate light that illuminates a path in the silica glass that couples a particular input waveguide to a particular output waveguide. The light from the light source has a wavelength that enables it to be substantially absorbed by the silica glass and substantially transmitted through the substrate. The illumination by the light increases the temperature and correspondingly the index of refraction of the silica glass in the path. A light signal is then able to travel through the coupled waveguides via the increased index of refraction of the silica glass within the path.

Abstract: A passive positive-gain equalizer comprises a ferrite (100, 300) electromagnetically coupled to a single conductor (111, 311) of a digital signal defined in the frequency domain by a plurality of frequencies. Although it has no external power source other than the digital signal, the equalizer amplifies some of the signal's frequencies. In one embodiment, the equalizer (100) comprises a "C"-shaped body portion (101) whose legs (103, 104) extend through holes in a PC board (110) to be spanned by an "I"-shaped body portion (102). A tunnel (106) formed thereby surrounds a stripline (111) and the PC board portion (112) which carries the stripline. In another embodiment, the equalizer (300) comprises an "E"-shaped body portion (301) whose legs (303-305) extend through holes in a PC board (310) to be spanned by an "I"-shaped body portion (302). A pair of tunnels (306, 307) is formed thereby, and the stripline (311, 511) loops through each of the tunnels one or more times.

Abstract: A card rack is provided for removably housing two types of circuit packs in respective first and second portions, e.g., upper and lower portions of the card rack. The card rack includes connectors for interconnecting components on the circuit packs with one another and to input and output cables. The input cables are connected only to circuit packs of one type which are disposed only in one, e.g., the lower, portion of the card rack. The upper card rack portion overhangs the lower card rack portion for, in combination with sides of the card rack, forming a recessed space through which the input cables are routed to the lower portion circuit packs. The passage of the cables through the recessed space isolates the cables from becoming entangled with traffic passing in front of the card rack and thereby avoids the need for a separate door enclosing the front portion of the card rack.

Abstract: A multiprocessor having an input/output controller, a process controller, and a multidimensional arrays of field programmable gate arrays (FPGAs), each FPGA having its own local memory. The multiprocessor may be programmed to function as a single-instruction, multiple-data (SIMD) parallel processor having a matrix of processing elements (PEs), where each FPGA may be programmed to operate as a submatrix array of PEs. The multiprocessor is especially useful for image processing, pattern recognition, and neural network applications.

Abstract: A Brag reflective Mach-Zehnder filter has arms that introduce a .pi. phase difference in transmission but not in reflection. In one embodiment a .pi. phase difference is introduced in one of the two arms between the Bragg grating and one of the couplers. In another embodiment, a phase difference of .pi./2 is introduced in one arm both before and after the grating and the location of the grating in the other arm is shifted. The transmission of the resulting filter is substantially independent of the degree of coupling at the input and the output. WDM systems employing the new filters are also disclosed.

Abstract: The invention specifies on-chip address matching hardware which is external to the processor core and prefetch queue of a microcontroller, and instruction decoding logic to mark and process breakpointed instructions. The address matching hardware includes a number of equality comparators which observe addresses on an intermodule bus of the microcontroller. This bus is not directly connected to the processor core and handles both instruction and data traffic. In one embodiment, four such matchers are provided. When an instruction address matches one of the breakpoints, a code indicating the breakpoint number is returned along with the instruction fetched. This breakpoint code is entered into the prefetch queue in the processor core, along with the instruction. When that instruction reaches the decode stage, the breakpoint information is decoded along with the instruction. The breakpoint actions associated with an instruction only occur when the instruction is about to be issued for execution.

Abstract: The present insulation displacement contact wire insertion tool that is used to enable a craftsperson to perform the various wire manipulation tasks required to insert and remove wires in insulation displacement contact connectors and terminal blocks. The wire insertion tool enables the craftsperson to place the wire in a stuffer blade that protrudes from the tip of the wire insertion tool while also threading the wire through a pair of wire cutting blades. The craftsperson can use the stuffer blade to press the wire into the insulation displacement contact and then operate the spring loaded cutting blades to cut the length of wire and receive an audible feedback that sufficient force has been applied to perform the operation. The single action of pressing the wire on to the insulation displacement contact both compresses the spring, installs the wire on the insulation displacement contact, and provides the audible feedback.

Abstract: There is disclosed a first adder subtractor combines the largest positive number or largest negative number capable of being represented by the number of bits in the datapath, as determined by the sign of an input to a second adder with a first input to generate a first potential sum. A second adder operating in parallel with the first adder combines first, second and third inputs to generate a second potential sum. An overflow detector combines the first and second inputs of the second adder to determine if there is an overflow. If an overflow is not present, a multiplexer selects the output of the second adder as the output to be saturated. If an overflow is present, the multiplexer selects the output from the first adder as the output to be saturated.

Abstract: In accordance with the invention, a uniformly spaced three-dimensional array of quantum dots is fabricated by forming a uniform grid of intersecting dislocation lines, nucleating a regular two-dimensional array of quantum dots on the intersections, and replicating the array on successively grown layers. The substrate is partitioned into a grid of in-plane lattice parameters, thereby providing a regular array of preferential nucleation sites for the influx atoms of a different size during the epitaxial process. The regularity of the array results in an equal partition of the incoming atoms which, in turn, leads to uniformly sized islands nucleating on these preferred sites. The result is a uniformly sized, regularly distributed two-dimensional array of quantum dots which can be replicated in succeeding layers.

Abstract: Methods and apparatus for performing optical signal switching or other optical routing functions in an optical device or system, in which crosstalk induced by modal interference is suppressed by providing appropriate loss, gain and/or refractive index changes in different parts of a switch structure. An exemplary optical signal switch includes first and second branches each having a refraction-controlled section and an absorption-controlled section. An optical signal path over which an optical signal propagates in passing through the switch is selected to include a portion of at least one of the first and second branches, such that one of the first and second branches is a selected branch and the other branch is a non-selected branch.

Abstract: A semiconductor EEPROM memory cell having a control circuit and an internal memory device for providing high speed electronic data storage (i.e. writing binary 1 and 0 functionality) in a relatively small physical area. In general, internal memory device has a floating gate, and a source, a drain and a gate coupled to the control circuit. In operation, the control circuit provides electrical signals to the source, drain and gate to control the writing of electrical data to and reading of electrical data from the internal memory device. When writing data to the memory device the control circuit provides electrical signals to the source, drain and gate to initiate electron tunneling between the floating gate and drain, wherein the electron tunneling ultimately produces a conductive or nonconductive state representing the data stored by the internal memory device.

Abstract: A cordless telephone system is arranged for extending the operating range of a cordless telephone portable unit within such system. The cordless telephone system comprises a plurality of cordless telephone stations that are connected to a plurality of intrapremises telephone wire-pairs and support independent simultaneous telephone calls without interference. Each cordless telephone station consists of a cordless telephone base unit and its associated cordless telephone portable unit. Although each of the portable units is associated with a particular base unit, all of the portable units are able to operate with any of the base units in the system. As a user of a portable unit with a call in progress roams about a premises, all base units monitor the quality of the radio frequency signal received from the portable unit.

Abstract: Systems and methods for providing secure smart card transactions are disclosed. Smart cards are arranged in a smart card hierarchy, the hierarchy including a first smart card at a first hierarchical level and a second smart card at a second hierarchical level higher than the first hierarchical level. A smart card reader is equipped to read smart cards and to accept personal identification (PIN) number inputs. According to one embodiment, a first PIN number is stored on the first smart card, the first PIN number corresponding to the first hierarchical level. A first security key is also stored on the first smart card. A second PIN number is stored on the second smart card, the second PIN number corresponding to the second hierarchical level. A second security key is stored on the second smart card. The PIN numbers and security keys are used to selectively lock and/or unlock a smart card.