Patents Assigned to Lucid Circuit, Inc.
  • Patent number: 10928443
    Abstract: Systems and methods for semiconductor design evaluation. IC layout information of a circuit design is received, and the circuit design is decomposed into smaller circuit pieces. Each circuit piece has IC layout information and a netlist. For each circuit piece, a set of strike models is selected based on the layout information and the net-list of the circuit piece and received radiation environment information. Each strike model has circuit components with voltage values corresponding to a respective particle strike. For each selected strike model of a circuit piece: a radiation susceptibility metric is determined by comparing functional results of simulation of the of the strike model with functional results of simulation of the circuit piece. For each circuit piece, a radiation susceptibility metric is determined based on the radiation susceptibility metrics generated for each selected strike model of the circuit piece.
    Type: Grant
    Filed: June 19, 2019
    Date of Patent: February 23, 2021
    Assignee: LUCID CIRCUIT, INC.
    Inventor: Michel D Sika
  • Patent number: 10901493
    Abstract: Methods and systems for providing hardware compute resiliency by using a compute fabric that includes sensors and re-programmable data processing components.
    Type: Grant
    Filed: June 8, 2019
    Date of Patent: January 26, 2021
    Assignee: Lucid Circuit, Inc.
    Inventor: Michel D Sika
  • Patent number: 10755201
    Abstract: A microelectronic device. The device includes: a first sensor die that includes sensors, and compute fabric dies that each include data processing circuit components and data storage circuit components. Within each compute fabric die at least one of the programmable data processing circuit components is electrically coupled to at least one of the data storage circuit components The device includes storage component dies, wherein each storage component die is electrically coupled to at least one compute fabric die. The first sensor die and each compute fabric die and storage component die is an integrated circuit semiconductor die. The compute fabric dies include at least a first compute fabric die and a second compute fabric die electrically coupled to the first compute fabric die. At least one of a data processing component and a storage component of the microelectronic device is electrically coupled to the first sensor.
    Type: Grant
    Filed: February 13, 2019
    Date of Patent: August 25, 2020
    Assignee: LUCID CIRCUIT, INC.
    Inventor: Michel D Sika
  • Patent number: 10345374
    Abstract: Systems and methods for semiconductor design evaluation. IC layout information of a circuit design is received, and the circuit design is decomposed into smaller circuit pieces. Each circuit piece has IC layout information and a netlist. For each circuit piece, a set of strike models is selected based on the layout information and the net-list of the circuit piece and received radiation environment information. Each strike model has circuit components with voltage values corresponding to a respective particle strike. For each selected strike model of a circuit piece: a radiation susceptibility metric is determined by comparing functional results of simulation of the of the strike model with functional results of simulation of the circuit piece. For each circuit piece, a radiation susceptibility metric is determined based on the radiation susceptibility metrics generated for each selected strike model of the circuit piece.
    Type: Grant
    Filed: July 20, 2018
    Date of Patent: July 9, 2019
    Assignee: LUCID CIRCUIT, INC.
    Inventor: Michel D Sika
  • Patent number: 10048313
    Abstract: Systems and methods for semiconductor design evaluation. IC layout information of a circuit design is received, and the circuit design is decomposed into smaller circuit pieces. Each circuit piece has IC layout information and a netlist. For each circuit piece, a set of strike models is selected based on the layout information and the net-list of the circuit piece and received radiation environment information. Each strike model has circuit components with voltage values corresponding to a respective particle strike. For each selected strike model of a circuit piece: a radiation susceptibility metric is determined by comparing functional results of simulation of the of the strike model with functional results of simulation of the circuit piece. For each circuit piece, a radiation susceptibility metric is determined based on the radiation susceptibility metrics generated for each selected strike model of the circuit piece.
    Type: Grant
    Filed: November 27, 2017
    Date of Patent: August 14, 2018
    Assignee: Lucid Circuit, Inc.
    Inventor: Michel D Sika
  • Patent number: 9857415
    Abstract: Systems and methods for semiconductor design evaluation. IC layout information of a circuit design is received, and the circuit design is decomposed into smaller circuit pieces. Each circuit piece has IC layout information and a netlist. For each circuit piece, a set of strike models is selected based on the layout information and the net-list of the circuit piece and received radiation environment information. Each strike model has circuit components with voltage values corresponding to a respective particle strike. For each selected strike model of a circuit piece: a radiation susceptibility metric is determined by comparing functional results of simulation of the of the strike model with functional results of simulation of the circuit piece. For each circuit piece, a radiation susceptibility metric is determined based on the radiation susceptibility metrics generated for each selected strike model of the circuit piece.
    Type: Grant
    Filed: June 20, 2017
    Date of Patent: January 2, 2018
    Assignee: Lucid Circuit, Inc.
    Inventor: Michel D Sika