Abstract: A multi-user computer network, in which graphics performance of client machines running graphics-based applications is optimized using an automated Internet-based graphics application profile management system. The automated Internet-based graphics application profile management system includes an Internet-based communication server, operably connected to the infrastructure of the Internet, and to a central database server, through an application server. The central database server stores graphic application profiles (GAPs) for different graphics-based applications that are capable of running on the client machines. The graphics application profiles are stored in a profile database in the multi-GPU graphics rendering subsystem of each client machine. The Internet-based communication server communicates with each client machine over the Internet, and automatically programs updated graphics application profiles (GAPs) in the profile database of each client machine.
Abstract: Vertical synchronization (v-sync) in prior art prevents video tearing artifacts by keeping the video pipeline synchronized with the monitor. Such technique keeps the frame rate of the rendering engine equal to monitor's refresh rate. However, it suffers from two substantial shortcomings: performance limitations and input lag, both of which are critical in real-time applications such as video games and professional applications (e.g. 3D CAD). The different embodiments of present invention, termed virtual vertical-synchronization (Virtual v-sync), eliminate tearing artifacts, while solving the shortfall of performance by shortening or dropping undisplayed frames, and solving the input lags by removing frame blocking. Any frame rate is achievable, independently of the monitor refresh. Two additional uses of the virtual vertical-synchronization are cloud gaming improvement and power consumption control.
Type:
Grant
Filed:
April 2, 2012
Date of Patent:
June 17, 2014
Assignee:
Lucidlogix Software Solutions, Ltd.
Inventors:
Reuven Bakalash, Ilan Grinberg, Natalya Segal
Abstract: A silicon chip of a monolithic construction for use in implementing a multiple core graphics processing and display subsystem in a computing system having a CPU, a system memory, an operating system (OS), a CPU bus, and a display device with a display surface. The computing system supports (i) one or more software applications for issuing graphics commands, (ii) one or more graphics libraries for storing data used to implement said graphics commands. The silicon chip comprises multiple graphic pipeline cores, a partial frame buffer for buffering pixels corresponding to image fragments, a routing center, control unit, and a display interface, for displaying composited images on the display surface of the computing system.
Abstract: A hub mechanism for use in a multiple graphics processing unit (GPU) system includes a hub routing unit positioned on a bus between a controller unit and multiple GPUs. The hub mechanism is used for routing data and commands over a graphic pipeline between a user interface and one or more display units. The hub mechanism also includes a hub driver for issuing commands for controlling the hub routing unit.