Abstract: A solderable light-emitting diode (LED) chip and a method of fabricating an LED lamp embodying the LED chip utilize a diffusion barrier that appreciably blocks molecular migration between two different layers of the LED chip during high temperature processes. In the preferred embodiment, the two different layers of the LED chip are a back reflector and a solder layer. The prevention of intermixing of the materials in the back reflector and the solder layer impedes degradation of the back reflector with respect to its ability to reflect light emitted by the LED. The LED chip includes a high power AlInGaP LED or other type of LED, a back reflector, a diffusion barrier and a solder layer. Preferably, the back reflector is composed of silver (Ag) or Ag alloy and the solder layer is made of indium (In), lead (Pb), gold (Au), tin (Sn), or their alloy and eutectics. In a first embodiment, the diffusion layer is made of nickel (Ni) or nickel-vanadium (NiV).

Abstract: An LED component is provided, with light emission in the green-to-near UV wavelength range. The light-emitting semiconductor die is encapsulated with one or more silicone compounds, including a hard outer shell, an interior gel or resilient layer, or both. The silicone material is stable over temperature and humidity ranges, and over exposure to ambient UV radiation. As a consequence, the LED component has an advantageously long lifetime, in which it is free of “yellowing” attenuation which would reduce the green-to-near UV light output.

Abstract: LEDs employing a III-Nitride light emitting active region deposited on a base layer above a substrate show improved optical properties with the base layer grown on an intentionally misaligned substrate with a thickness greater than 3.5 &mgr;m. Improved brightness, improved quantum efficiency, and a reduction in the current at which maximum quantum efficiency occurs are among the improved optical properties resulting from use of a misaligned substrate and a thick base layer. Illustrative examples are given of misalignment angles in the range from 0.05° to 0.50°, and base layers in the range from 6.5 to 9.5 &mgr;m although larger values of both misalignment angle and base layer thickness can be used. In some cases, the use of thicker base layers provides sufficient structural support to allow the substrate to be removed from the device entirely.

Abstract: Presented is a method of conformally coating a light emitting semiconductor structure with a phosphor layer to produce a substantially uniform white light. A light emitting semiconductor structure is coupled to a submount, a first bias voltage is applied to the submount, and a second bias voltage is applied to a solution of charged phosphor particles. The charged phosphor particles deposit on the conductive surfaces of the light emitting semiconductor structure. If the light emitting semiconductor structure includes a nonconductive substrate, the light emitting semiconductor structure is coated with an electroconductive material to induce phosphor deposition. The electrophoretic deposition of the phosphor particles creates a phosphor layer of uniform thickness that produces uniform white light without colored rings.

Abstract: An inverted III-nitride light-emitting device (LED) with highly reflective ohmic contacts includes n- and p-electrode metallizations that are opaque, highly reflective, and provide excellent current spreading. The n- and p-electrodes each absorb less than 25% of incident light per pass at the peak emission wavelength of the LED active region.

Abstract: The invention is a method for designing semiconductor light emitting devices such that the side surfaces (surfaces not parallel to the epitaxial layers) are formed at preferred angles relative to vertical (normal to the plane of the light-emitting active layer) to improve light extraction efficiency and increase total light output efficiency. Device designs are chosen to improve efficiency without resorting to excessive active area-yield loss due to shaping. As such, these designs are suitable for low-cost, high-volume manufacturing of semiconductor light-emitting devices with improved characteristics.

Abstract: An optical semiconductor device having a plurality of GaN-based semiconductor layers containing a strained quantum well layer in which the strained quantum well layer has a piezoelectric field that depends on the orientation of the strained quantum well layer when the quantum layer is grown. In the present invention, the strained quantum well layer is grown with an orientation at which the piezoelectric field is less than the maximum value of the piezoelectric field strength as a function of the orientation. In devices having GaN-based semiconductor layers with a wurtzite crystal structure, the growth orientation of the strained quantum well layer is tilted at least 1° from the {0001} direction of the wurtzite crystal structure. In devices having GaN-based semiconductor layers with a zincblende crystal structure, the growth orientation of the strained quantum well layer is tilted at least 1° from the {111} direction of the zincblende crystal structure.

Abstract: The present invention relates to reducing the spatial variation in light output from flipchip LEDs and increasing the consistency in light output from LED to LED in a practical manufacturing process. The present invention introduce appropriate texture into the surface of reflective layer to reduce spatial variation in far-field intensity. At least two reflective planes are provided in the reflective contact parallel to the light emitting region such that at least two interference patterns occur in the light exiting from the LED. The reflective planes are separated by an odd integral multiple of (&lgr;n/4) where &lgr;n is the wavelength of the light in the layer between the active region and the reflective contact, resulting in compensating interference maxima and minima, a more uniform distribution of light, and increased consistency in light output from LED to LED.

Abstract: A luminaire comprising a set of light sources, in particular LEDs, which are arranged predominantly in a first plane, and a set of substantially identical optical sources arranged predominantly in a second plane extending parallel to the first plane. The position of one of the light sources with respect to an optical clement opposite said light source differs from the position of a further light source with respect to an optical element opposite said light source.

Abstract: Series or parallel LED arrays are formed on a highly resistive substrate, such that both the p- and n-contacts for the array are on the same side of the array. The individual LEDs are electrically isolated from each other by trenches or by ion implantation. Interconnects deposited on the array connects the contacts of the individual LEDs in the array. In some embodiments, the LEDs are III-nitride devices formed on sapphire substrates. In one embodiment, two LEDs formed on a single substrate are connected in antiparallel to form a monolithic electrostatic discharge protection circuit. In one embodiment, multiple LEDs formed on a single substrate are connected in series . In one embodiment, multiple LEDs formed on a single substrate are connected in parallel. In some embodiments, a layer of phosphor covers a portion of the substrate on which one or more individual LEDs is formed.

Abstract: A substrate for fabricating semiconductor devices based on Group III semiconductors and the method for making the same. A substrate according to the present invention includes a base substrate, a first buffer layer, and a first single crystal layer. The first buffer layer includes a Group III material deposited on the base substrate at a temperature below that at which the Group III material crystallizes. The Group III material is crystallized by heating the buffer layer to a temperature above that at which the Group III material crystallizes to form a single crystal after the Group III material has been deposited. The first single crystal layer includes a Group III-V semiconducting material deposited on the first buffer layer at a temperature above that at which the Group III semiconducting material crystallizes. In one embodiment of the present invention, a second buffer layer and a second single crystal layer are deposited on the first single crystal layer.

Abstract: A nitride semiconductor epitaxial substrate includes a low-temperature-deposited buffer layer, the composition of which is AlxGa1−xN, where 0≦x≦1, and a single crystalline layer, the composition of which is AlyGa1−yN, where 0>y≦1. The single crystalline layer is deposited directly over the low-temperature-deposited buffer layer, wherein the buffer layer has a mole fraction x satisfying (y−0.3)≦x>y.

Abstract: A light-generating device such as a laser or LED. A light-generating device according to the present invention includes a first n-electrode layer in contact with a first n-contact layer, the first n-contact layer including an n-doped semiconductor. Light is generated by the recombination of holes and electrons in an n-p active layer. The n-p active layer includes a first p-doped layer in contact with a first n-doped layer, the first n-doped layer being connected electrically with the first n-contact layer. A p-n reverse-biased tunnel diode constructed from a second p-doped layer in contact with a second n-doped layer is connected electrically such that the second p-doped layer is connected electrically with the first p-layer. A second n-contact layer constructed from an n-doped semiconductor material is connected electrically to the second n-doped layer. A second n-electrode layer is placed in contact with the second n-contact layer.

Abstract: A method of forming a light emitting semiconductor device includes fabricating a stack of layers comprising an active region, and wafer bonding a structure including a carrier confinement semiconductor layer to the stack. A light emitting semiconductor device includes a first carrier confinement layer of a first semiconductor having a first conductivity type, an active region, and a wafer bonded interface disposed between the active region and the first carrier confinement layer. The light emitting semiconductor device may further include a second carrier confinement layer of a second semiconductor having a second conductivity type, with the active region disposed between the first carrier confinement layer and the second carrier confinement layer. The wafer bonded confinement layer provides enhanced carrier confinement and device performance.

Abstract: The present invention is an inverted III-nitride light-emitting device (LED) with enhanced total light generating capability. A large area device has an n-electrode that interposes the p-electrode metallization to provide low series resistance. The p-electrode metallization is opaque, highly reflective, and provides excellent current spreading. The p-electrode at the peak emission wavelength of the LED active region absorbs less than 25% of incident light per pass. A submount may be used to provide electrical and thermal connection between the LED die and the package. The submount material may be Si to provide electronic functionality such as voltage-compliance limiting operation. The entire device, including the LED-submount interface, is designed for low thermal resistance to allow for high current density operation. Finally, the device may include a high-refractive-index (n>1.8) superstrate.

Abstract: A method for separating semiconductor devices is disclosed. The method includes providing a substrate having one or more epitaxial layers formed thereon, forming trenches in the one or more epitaxial layers, forming scribe lines in a surface of the substrate, wherein the locations of the scribe lines correspond to the locations of the trenches, and separating the semiconductor devices by cracking the wafer along the scribe lines.

Abstract: The present invention is an inverted III-nitride light-emitting device (LED) with enhanced total light generating capability. A large area device has an n-electrode that interposes the p-electrode metallization to provide low series resistance. The p-electrode metallization is opaque, highly reflective, and provides excellent current spreading. The p-electrode at the peak emission wavelength of the LED active region absorbs less than 25% of incident light per pass. A submount may be used to provide electrical and thermal connection between the LED die and the package. The submount material may be Si to provide electronic functionality such as voltage-compliance limiting operation. The entire device, including the LED-submount interface, is designed for low thermal resistance to allow for high current density operation. Finally, the device may include a high-refractive-index (n>1.8) superstrate.

Abstract: A light emitting device in accordance with an embodiment of the present invention includes a first semiconductor layer of a first conductivity type having a first surface, and an active region formed overlying the first semiconductor layer. The active region includes a second semiconductor layer which is either a quantum well layer or a barrier layer. The second semiconductor layer is formed from a semiconductor alloy having a composition graded in a direction substantially perpendicular to the first surface of the first semiconductor layer. The light emitting device also includes a third semiconductor layer of a second conductivity type formed overlying the active region.

Abstract: A light emitting device includes a light source that emits first light in response to an electrical signal, and a fluorescent layer positioned over the light source. The fluorescent layer includes a first fluorescent material which radiates second light and a second fluorescent material which radiates third light. In one embodiment, the second fluorescent material contains europium activated calcium sulfide. In another embodiment, the second fluorescent material contains europium activated nitrido-silicate. In some embodiments, the device includes a light propagation medium which transmits the first, second, and third light as composite output.

Abstract: An LED package and a method of fabricating the LED package utilize a prefabricated fluorescent member that contains a fluorescent material that can be separately tested for optical properties before assembly to ensure the proper performance of the LED package with respect to the color of the output light. The LED package includes one or more LED dies that operate as the light source of the package. Preferably, the fluorescent material included in the prefabricated fluorescent member and the LED dies of the LED package are selectively chosen, so that output light generated by the LED package duplicates natural white light. In a first embodiment of the invention, the prefabricated fluorescent member is a substantially planar plate having a disk-like shape. In a second embodiment, the prefabricated fluorescent member is a non-planar disk that conforms to and is attached to the inner surface of a concave lens.