Abstract: The present invention is a programmable Analog to Digital Converter (ADC) unit (200) that includes an analog to digital converter (204), which includes one or more analog inputs (202). The unit (200) additionally includes a control/status register block (216). The unit 200 further includes a FIFO register block (206) with a first, second, third, and fourth FIFO conversion register. Further included is a programmable sequencer (300) that includes a first (208), second (210), third (212), and fourth (214) programmable sample sequencer. And further, the unit (200) includes a first (226), second (228), third (230), and fourth (232) trigger event control multiplexer, where each trigger event control multiplexer corresponds to each programmable sample sequencer.