Abstract: This disclosure describes a configuration data structure (100) that describes the functional characteristics of a single semiconductor device during the mass customization of semiconductor devices. The configuration data structure (100) includes a device identification member (110), a peripheral enable member (111), an alternate function select member (112), a port bonding specification member (113), and a resource specification member (114). In addition, this disclosure describes a system (300) that specifies and controls the functional characteristics of a single semiconductor device during the mass customization of semiconductor devices. The system (300) includes the following one or more internal peripheral buses (201), one or more peripherals (320-326), a functional I/O mux (302), a configuration data structure (100), and a GPIO (212).
Type:
Application
Filed:
December 12, 2007
Publication date:
December 16, 2010
Applicant:
LUMINARY MICRO, INC.
Inventors:
Scott HR McMahon, Brian C. Kircher, Gregory A. North
Abstract: The present invention is a programmable Analog to Digital Converter (ADC) unit (200) that includes an analog to digital converter (204), which includes one or more analog inputs (202). The unit (200) additionally includes a control/status register block (216). The unit 200 further includes a FIFO register block (206) with a first, second, third, and fourth FIFO conversion register. Further included is a programmable sequencer (300) that includes a first (208), second (210), third (212), and fourth (214) programmable sample sequencer. And further, the unit (200) includes a first (226), second (228), third (230), and fourth (232) trigger event control multiplexer, where each trigger event control multiplexer corresponds to each programmable sample sequencer.
Type:
Grant
Filed:
December 21, 2006
Date of Patent:
May 12, 2009
Assignee:
Luminary Micro, Inc.
Inventors:
Scott H R McMahon, Brian C. Kircher, Gregory A. North
Abstract: The present invention is a programmable Analog to Digital Converter (ADC) unit (200) that includes an analog to digital converter (204), which includes one or more analog inputs (202). The unit (200) additionally includes a control/status register block (216). The unit 200 further includes a FIFO register block (20)6 with a first, second, third, and fourth FIFO conversion register. Further included is a programmable sequencer (300) that includes a first (208), second (210), third (212), and fourth (214) programmable sample sequencer And further, the unit (200) includes a first (226), second (228), third (230), and fourth (232) trigger event control multiplexer, where each trigger event control multiplexer corresponds to each programmable sample sequencer.
Type:
Application
Filed:
December 21, 2006
Publication date:
December 4, 2008
Applicant:
LUMINARY MICRO, INC.
Inventors:
Scott HR McMahon, Brian C. Kircher, Gregory A. North