Abstract: Embodiments of the present invention provide an approach for improving overall chip speed by providing one or more sampling circuits in an ROIC so that signal processing and signal reading out operations may occur simultaneously instead of successively.

Abstract: Embodiments of the present invention provide a computer-implemented method for determining an amplification gain for an X-ray image sensor module. Specifically, among other things, embodiments of the present invention provide a computer-implemented infrastructure comprising: capturing an electrical signal by a pixel sensor; and determining an amplification gain of the electrical signal at a charge sensitive amplifier by turning a switch on or off, wherein the switch connects the pixel sensor to a capacitor.

Abstract: Embodiments of the present invention provide a computer-implemented method for parallel readout for an X-ray image sensor module having a pixel array. Specifically, among other things, embodiments of the present invention provide a computer-implemented infrastructure comprising: generating a pixel data for each pixel within a respective pixel row of the pixel array based on a photon count; receiving a first serial pixel data, wherein the first serial pixel data comprises pixel data from a plurality of pixels of a first column; receiving a second serial pixel data, wherein the second serial pixel data comprises pixel data from a plurality of pixels of a second column; and shifting the first serial pixel data from the first column register to the second column register.

Abstract: Embodiments of the present invention provide a computer-implemented method for parallel readout for an X-ray image sensor module having a pixel array. Specifically, among other things, embodiments of the present invention provide a computer-implemented infrastructure comprising: capturing an electrical signal at each of a plurality of pixels within the pixel array; converting each of the captured electrical signals into a respective voltage; comparing each of the respective voltages with a reference voltage to discriminate whether the electric signal from the sensor represents a photon detection; counting a photon detection for each of the plurality of pixels within the pixel array based upon an output of the comparator; connecting all pixels in each of the columns; and sequentially selecting said rows of pixels for readout over the column bus lines at a sensor output.

Abstract: Embodiments of the present invention provide an approach for improving overall chip speed by providing one or more sampling circuits in an ROIC so that signal processing and signal reading out operations may occur simultaneously instead of successively.

Abstract: A sampling circuit for dynamic imaging is provided. Specifically, embodiments of the present invention relate to a readout integrated circuit (ROIC) for dynamic imaging and a related image sensor. In one embodiment of the present invention, a sampling circuit is provided that comprises: an amplifier circuit, which amplifies charge signals generated at photo diodes and converts them to voltage signals; a filter circuit (optional) that receives and filters the voltage signals to yield a filtered signal; a sampling circuit, which samples the voltage signals and outputs a sampled signal in accordance with a sampling control signal; and a digital converter, which converts the sampled signal into a digital format and outputs a digital signal.

Abstract: An approach for a sampling circuit to reduce noise in signals (e.g., as received from photo diodes or the like) is provided. In one embodiment of the present invention, there is a sampling circuit comprising: an amplifier, which amplifies charge signals generated at photo diodes and converts them to voltage signals; the first sample and hold circuit, which samples the voltage signal and charges the first capacitor according to the first switching signal, and outputs the stored charge as a reset signal based on a readout signal; the second sample and hold circuit, which samples the signals and charges the second capacitor according to the second switching signal that is non-overlapping to the first switching signal, and outputs the stored charge as a reset signal based on the readout signal; a resistor that acts as a low-pass filter placed in between the first and the second capacitors' common nodes.

Abstract: Embodiments of the present invention provide a computer-implemented method for determining an amplification gain for an X-ray image sensor module. Specifically, among other things, embodiments of the present invention provide a computer-implemented infrastructure comprising: capturing an electrical signal by a pixel sensor; and determining an amplification gain of the electrical signal at a charge sensitive amplifier by turning a switch on or off, wherein the switch connects the pixel sensor to a capacitor.

Abstract: Embodiments of the present invention provide a computer-implemented method for setting an amplification gain of a pixel array. Specifically, among other things, embodiments of the present invention provide a computer-implemented infrastructure comprising: receiving an electrical signal from an ionizing radiation source at one or more pixel sensors of a plurality of pixel sensors within the pixel array; setting an amplification gain of the electrical signal at a charge sensitive amplifier by turning a switch on or off, wherein the switch connects the at least one or more pixel sensors to a respective capacitor; scanning the pixel array to determine the ionizing radiation source intensity; and generating a gain control signal based on the ionizing radiation source intensity.

Abstract: Embodiments of the present invention provide a computer-implemented method for parallel readout for an X-ray image sensor module having a pixel array. Specifically, among other things, embodiments of the present invention provide a computer-implemented infrastructure comprising: capturing an electrical signal at each of a plurality of pixels within the pixel array; converting each of the captured electrical signals into a respective voltage; comparing each of the respective voltages with a reference voltage to discriminate whether the electric signal from the sensor represents a photon detection; counting a photon detection for each of the plurality of pixels within the pixel array based upon an output of the comparator; connecting all pixels in each of the columns; and sequentially selecting said rows of pixels for readout over the column bus lines at a sensor output.

Abstract: Embodiments of the present invention provide a computer-implemented method for parallel readout for an X-ray image sensor module having a pixel array. Specifically, among other things, embodiments of the present invention provide a computer-implemented infrastructure comprising: generating a first pixel data for each pixel within a first pixel row of the pixel array based on a first photon count; generating a second pixel data for each pixel within a second pixel row of the pixel array based on a second photon count; receiving the first serial pixel data at a buffer; transmitting the first serial data to a column bus line; and receiving the second serial pixel data at the buffer, wherein the second serial pixel data is received at the buffer in parallel to the transmitting the first serial data to the column bus line.

Abstract: Embodiments of the present invention provide a computer-implemented method for parallel readout for an X-ray image sensor module having a pixel array. Specifically, among other things, embodiments of the present invention provide a computer-implemented infrastructure comprising: generating a pixel data for each pixel within a respective pixel row of the pixel array based on a photon count; receiving a first serial pixel data, wherein the first serial pixel data comprises pixel data from a plurality of pixels of a first column; receiving a second serial pixel data, wherein the second serial pixel data comprises pixel data from a plurality of pixels of a second column; and shifting the first serial pixel data from the first column register to the second column register.

Abstract: The present invention is related to, in general, an output voltage adaptive converting apparatus and method thereof. The invention provides an output voltage adaptive voltage converting apparatus, comprising a clock generating unit that generates predetermined clock signals; a switching amplifying unit that amplifies an input voltage (Vi) and produces an output voltage (Vo) based on the clock signals; a feedback filtering unit that filters the output voltage (Vo) and produces a filtered voltage (VOB); a voltage comparing unit that compares the filtered voltage (VOB) with the input voltage (Vi) and produces a control voltage (Vc); and a voltage switching unit that connects a source voltage (Vdd) of the clock generating unit to the input voltage (Vi) or the filtered voltage (VOB) based on the control voltage (Vc).

Abstract: The present invention is related to, in general, an output voltage adaptive converting apparatus and method thereof. The invention provides an output voltage adaptive voltage converting apparatus, comprising a clock generating unit that generates predetermined clock signals; a switching amplifying unit that amplifies an input voltage (Vi) and produces an output voltage (Vo) based on the clock signals; a feedback filtering unit that filters the output voltage (Vo) and produces a filtered voltage (VOB); a voltage comparing unit that compares the filtered voltage (VOB) with the input voltage (Vi) and produces a control voltage (Vc); and a voltage switching unit that connects a source voltage (Vdd) of the clock generating unit to the input voltage (Vi) or the filtered voltage (VOB) based on the control voltage (Vc).

Abstract: Disclosed herein is a sine wave oscillator having a self-startup circuit. The sine wave oscillator can start up and output sine waves having a constant frequency without receiving any signals other than supply voltage. The sine wave oscillator includes an operational amplification unit, a first resistor, a first capacitor, a second capacitor, a second resistor, a third resistor, a fourth resistor, and a startup circuit.

Abstract: Disclosed herein is a sine wave oscillator. The sine wave oscillator includes an operational amplification unit, a first resistor, a first capacitor, a second capacitor, a second resistor, a third resistor, a fourth resistor, and a startup circuit. The first ends of the first resistor and the first capacitor are connected to the plus input terminal of the operational amplification unit. The first end of the second capacitor is connected to the plus input terminal. The first end of the second resistor is connected to the second end of the second capacitor and its second end is connected to the output terminal of the operational amplification unit. The first end of the third resistor is connected to the minus input terminal of the operational amplification unit. The fourth resistor is connected between the minus input terminal and the output terminal. The first end of the startup circuit is connected to the minus input terminal.