Patents Assigned to M/A-Com
  • Patent number: 7049181
    Abstract: A heterojunction P-I-N diode switch comprises a first layer of doped semiconductor material of a first doping type, a second layer of doped semiconductor material of a second doping type and a substrate on which is disposed the first and second layers. An intrinsic layer of semiconductor material is disposed between the first layer and second layer. The semiconductor material composition of at least one of the first layer and second layer is sufficiently different from that of the intrinsic layer so as to form a heterojunction therebetween, creating an energy barrier in which injected carriers from the junction are confined by the barrier, effectively reducing the series resistance within the I region of the P-I-N diode and the insertion loss relative to that of homojunction P-I-N diodes.
    Type: Grant
    Filed: August 10, 2004
    Date of Patent: May 23, 2006
    Assignee: M/A-Com
    Inventors: David Russell Hoag, Timothy Edward Boles, James Joseph Brogle
  • Patent number: 6819201
    Abstract: A high speed switching apparatus comprises first and second parallel balanced lines each directed from an input line end to an output line end and adapted to receive equal and opposite currents to provide balanced operation. Third and fourth parallel balanced lines are spaced apart one from the other and each directed from an input line end to an output line end and adapted to receive equal and opposite currents to provide balanced operation. A first switch is coupled between the output end of the first line and the input end of the third line, and operative in a first high impedance off state and a second low impedance on state. A second switch is coupled between the output end of the second line and the input end of the fourth line, and operative in a first high impedance off state and a second low impedance on state.
    Type: Grant
    Filed: July 19, 2002
    Date of Patent: November 16, 2004
    Assignee: M/A-Com
    Inventor: Nitin Jain
  • Publication number: 20040195585
    Abstract: A heterostructured field effect transistor has a multi-gate configuration, in which the gate voltages are individually biased to tailor the potential field. The multi-gate configuration can be a two-, three-, or four-gate configuration. The transconductance of the transistor can be substantially linear over a range of gate voltages.
    Type: Application
    Filed: December 5, 2003
    Publication date: October 7, 2004
    Applicants: University of Massachusetts Lowell, M/A-COM
    Inventors: Samson Mil'shtein, Peter Ersland, Shivarajiv Kumar Somisetty, Carlos Gil
  • Patent number: 6657522
    Abstract: A wide bandwidth bias tee including a high frequency terminal, a first resistor coupled between the high frequency terminal and a capacitor, a second resistor coupled to the capacitor, the second resistor coupled in series with the first resistor, and a low frequency terminal, the low frequency terminal coupled to the second resistor.
    Type: Grant
    Filed: February 1, 2002
    Date of Patent: December 2, 2003
    Assignee: M/A-Com
    Inventors: M. Tekamul Buber, Adil Khalil, Robert Ian Gresham
  • Patent number: 4649675
    Abstract: An apparatus for mounting an antenna on a flat roof without penetrating the waterproof membrane of the roof is disclosed herein. The apparatus is comprised of a rigid base having a planar lower surface adapted to overlie the flat roof, ballast means carried by the base to stabilize the base, and antenna support means connected to and extending upwardly from the base.
    Type: Grant
    Filed: November 12, 1985
    Date of Patent: March 17, 1987
    Assignee: M/A-Com
    Inventors: Nicholas Moldovan, Bobby R. Hodges